Pin/Peg Programmable Logic Devices (PLD) 482

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF8452AGI160-6	Altera	Loadable PLD	Industrial	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 116 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	452 Flip Flops; 336 Logic Elements					39.624 mm		116
EPM7256EGI192-12P	Altera	EE PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.5 V	256	CMOS			5	3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 164 I/O	0	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	256 Macrocells	e0	125 MHz		220 °C (428 °F)	45.15 mm	No	164
EPM7256EGC192-7	Altera	EE PLD	Commercial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	7.5 ns		No	5.25 V	256	CMOS			5	3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 160 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz		220 °C (428 °F)	45.15 mm	No	160
EPF8820GI192-3	Altera	Loadable PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		672	No	5.5 V		CMOS		152	5	3.3/5,5 V	Grid Array	PGA192,17X17	Field Programmable Gate Arrays		Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 148 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	820 Flip Flops; 672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		148	220 °C (428 °F)	45.15 mm		148
EP1810GM-45/883	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.5 V		CMOS	MIL-STD-883		5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)		Perpendicular	S-CPGA-P68		4.96 mm	27.94 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks		22.2 MHz			27.94 mm		48
EPM7192EGC160-12	Altera	EE PLD	Commercial	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.25 V	192	CMOS			5	3.3/5,5 V	Grid Array	PGA160M,15X15	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 124 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P160	1	5.34 mm	39.624 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz		220 °C (428 °F)	39.624 mm	No	124
EPF10K250AGI599-2	Altera	Loadable PLD	Industrial	Pin/Peg	599	IPGA	Square	Ceramic, Metal-Sealed Cofired	17 ns		No	3.6 V		CMOS			3.3		Grid Array, Interstitial Pitch				Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 470 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P599		5.08 mm	62.484 mm	No						62.484 mm		470
EPM9400GC280-20	Altera	EE PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	23.2 ns		No	5.25 V	400	CMOS			5	3.3/5,5 V	Grid Array	PGA280,19X19	Programmable Logic Devices	Yes	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	0 Dedicated Inputs, 180 I/O	0	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz		220 °C (428 °F)	49.78 mm	Yes	180
EPM5128AGC68-20	Altera	UV PLD	Commercial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns		No	5.25 V		CMOS			5		Grid Array, Window				Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz			27.94 mm		52
EP1800GM-3	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	80 ns		No	5.5 V	48	CMOS			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	12 Dedicated Inputs, 48 I/O	12	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68		5.0038 mm	27.94 mm	No	48 Macrocells	e0	18.5 MHz		220 °C (428 °F)	27.94 mm	No	48
EP1810GI68-25	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	28 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68		4.96 mm	27.94 mm	No	48 Macrocells; Shared Input/Clock		50 MHz			27.94 mm		48
EPF10K30GM403-5	Altera	Loadable PLD	Military	Pin/Peg	403	IPGA	Square	Ceramic, Metal-Sealed Cofired	27 ns		No	5.5 V		CMOS			5		Grid Array, Interstitial Pitch				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 248 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P403		3.916 mm	49.78 mm	No	1728 Logic elements Configurable I/O operation with 3.3 V or 5 V		53.76 MHz			49.78 mm		248
EPF8820AGC192-4	Altera	Loadable PLD	Commercial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired		672	No	5.25 V		CMOS		152	5	3.3/5,5 V	Grid Array	PGA192M,17X17	Field Programmable Gate Arrays		Registered	4.75 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 152 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P192	1	5.43 mm	45.15 mm	No	672 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0	357 MHz	148	220 °C (428 °F)	45.15 mm		152
EPM9320GI280-12	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.5 V		CMOS			5		Grid Array				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 168 I/O	0	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	320 Macrocells; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		168
EPM7256EGM192-20	Altera	EE PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns		No	5.5 V	256	CMOS			5	3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	62.5 MHz		220 °C (428 °F)	45.15 mm	No	160
EPM5128GM	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No		128	CMOS			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P68		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	27.94 mm	No	52
EPF81188AGM232-4	Altera	Loadable PLD	Military	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P232		5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V					44.7 mm		180
EP1830GC-20	Altera	OT PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic	22 ns		No		48	CMOS			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No			2.54 mm	70 °C (158 °F)			0 °C (32 °F)	Tin Lead	Perpendicular	S-XPGA-P68	1			No		e0			220 °C (428 °F)		No
EP20K1500EPC984-1	Altera	Loadable PLD	Other	Pin/Peg	984	PGA	Square	Ceramic, Metal-Sealed Cofired			No	1.89 V					1.8		Grid Array				Macrocell	1.71 V		85 °C (185 °F)	4 Dedicated Inputs, 858 I/O	4	0 °C (32 °F)		Perpendicular	S-CPGA-P984				No			160 MHz					858
EPF81188AGM232-3	Altera	Loadable PLD	Military	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	125 °C (257 °F)	4 Dedicated Inputs, 180 I/O	4	-55 °C (-67 °F)		Perpendicular	S-CPGA-P232		5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V					44.7 mm		180
5962-8946804XC	Altera	UV PLD	Military	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 52 I/O	7	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P68		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e4	66.7 MHz			27.94 mm		52
EPF8636AGI192-A-3	Altera	Loadable PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	1.8 ns		No	3.6 V		CMOS			3.3		Grid Array				Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 136 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	Can also operate at 5 V supply					45.15 mm		136
EPM5128AGI68-20	Altera	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)		Perpendicular	S-CPGA-P68		4.953 mm	27.94 mm	No	Labs interconnected by PIA; 8 Labs; 1 External Clock		66.7 MHz			27.94 mm		52
EP20K1500EPC984-3	Altera	Loadable PLD	Other	Pin/Peg	984	PGA	Square	Ceramic, Metal-Sealed Cofired			No	1.89 V					1.8		Grid Array				Macrocell	1.71 V		85 °C (185 °F)	4 Dedicated Inputs, 858 I/O	4	0 °C (32 °F)		Perpendicular	S-CPGA-P984				No			160 MHz					858
EPF10K200EGI599-3	Altera	Loadable PLD	Industrial	Pin/Peg	599	IPGA	Square	Ceramic, Metal-Sealed Cofired	16 ns	9984	No	2.7 V		CMOS		470	2.5	2.5,2.5/3.3 V	Grid Array, Interstitial Pitch	SPGA599,47X47	Field Programmable Gate Arrays		Mixed	2.3 V	2.54 mm	85 °C (185 °F)	470 I/O		-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P599	1	5.08 mm	62.484 mm	No		e0		470	220 °C (428 °F)	62.484 mm		470
EPF10K70GI504-5	Altera	Loadable PLD	Industrial	Pin/Peg	504	PGA	Square	Ceramic, Metal-Sealed Cofired	27 ns		No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V		85 °C (185 °F)	4 Dedicated Inputs, 358 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P504				No	3744 Logic elements Configurable I/O operation with 3.3 V or 5 V		53.76 MHz					358
5962-9206202MYX	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	59 ns		No	5.5 V	192	CMOS	MIL-STD-883 Class B		5	5 V	Grid Array	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No			27.7 MHz		220 °C (428 °F)	28.45 mm	No	64
EPF8452AGI160-A-4	Altera	Loadable PLD	Industrial	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	1.9 ns		No	3.6 V		CMOS			3.3		Grid Array				Registered	3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 120 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	Can also operate at 5 V supply					39.624 mm		120
5962-9314401MZC	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.5 V		CMOS	MIL-STD-883		5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e4	33.3 MHz			33.528 mm		64
EPM5192GM	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No		192	CMOS			5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell		2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz		220 °C (428 °F)	28.45 mm	No	64
EPM5130GC100	Altera	UV PLD	Commercial	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.25 V	128	CMOS			5	5 V	Grid Array, Window	PGA100M,13X13	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	19 Dedicated Inputs, 64 I/O	19	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P100	1	4.96 mm	33.528 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz		220 °C (428 °F)	33.528 mm	No	64
EPM5130GM-2	Altera	UV PLD	Military	Pin/Peg	100	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100		3.81 mm	33.528 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz			33.528 mm		64
EPF10K70GI503-3	Altera	Loadable PLD	Industrial	Pin/Peg	503	IPGA	Square	Ceramic, Metal-Sealed Cofired	19.1 ns		No	5.25 V		CMOS			5		Grid Array, Interstitial Pitch				Registered	4.75 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 358 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P503		5.077 mm	57.4 mm	No						57.4 mm		358
EPM9400GI280-12	Altera	EE PLD	Industrial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	12 ns		No	5.5 V		CMOS			5		Grid Array				Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	0 Dedicated Inputs, 184 I/O	0	-40 °C (-40 °F)		Perpendicular	S-CPGA-P280		5.081 mm	49.78 mm	No	400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz			49.78 mm		184
EP1810GC-35	Altera	UV PLD	Commercial	Pin/Peg	68	PGA	Square	Ceramic, Metal-Sealed Cofired	40 ns		No	5.25 V	48	CMOS			5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P68	1			No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	28.6 MHz		220 °C (428 °F)		No	48
EPM7256EGM883B192-15	Altera	EE PLD	Military	Pin/Peg	192	PGA	Square	Ceramic, Metal-Sealed Cofired	15 ns		No	5.5 V		CMOS			5		Grid Array				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs, 160 I/O	0	-55 °C (-67 °F)		Perpendicular	S-CPGA-P192		5.43 mm	45.15 mm	No	256 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock		76.9 MHz			45.15 mm		160
EPF10K250EGC599-1	Altera	Loadable PLD	Commercial	Pin/Peg	599	HIPGA	Square	Ceramic, Metal-Sealed Cofired		12160	No	2.7 V		CMOS		470	2.5	2.5,2.5/3.3 V	Grid Array, Heat Sink/Slug, Interstitial Pitch	SPGA599,47X47	Field Programmable Gate Arrays		Mixed	2.3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 470 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P599	1	5.08 mm	62.484 mm	No		e0		470	220 °C (428 °F)	62.484 mm		470
EPF81188AGC232-4	Altera	Loadable PLD	Commercial	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired		1008	No	5.25 V		CMOS		184	5	3.3/5,5 V	Grid Array	PGA232M,17X17	Field Programmable Gate Arrays		Registered	4.75 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 184 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P232	1	5.207 mm	44.7 mm	No	1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0	357 MHz	180	220 °C (428 °F)	44.7 mm		184
5962-9206201MZC	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	90 ns		No	5.5 V		CMOS	MIL-STD-883 Class B		5		Grid Array				Macrocell	4.5 V		125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			19.6 MHz					64
EP20K1000EPC984	Altera	Loadable PLD	Other	Pin/Peg	984	PGA	Square	Ceramic, Metal-Sealed Cofired			No	1.89 V					1.8		Grid Array				Macrocell	1.71 V		85 °C (185 °F)	4 Dedicated Inputs, 716 I/O	4	0 °C (32 °F)		Perpendicular	S-CPGA-P984				No			160 MHz					716
EPM7256SGI192-15	Altera	EE PLD	Industrial	Pin/Peg	192	PGA	Square	Ceramic	15 ns		No		256	CMOS				3.3/5,5 V	Grid Array	PGA192M,17X17	Programmable Logic Devices	Yes			2.54 mm	85 °C (185 °F)			-40 °C (-40 °F)	Tin Lead	Perpendicular	S-XPGA-P192	1			No		e0			220 °C (428 °F)		Yes
EPM5192GC84	Altera	UV PLD	Commercial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.25 V	192	CMOS			5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	28.448 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz		220 °C (428 °F)	28.448 mm	No	64
EPF10K250EGI599-3	Altera	Loadable PLD	Industrial	Pin/Peg	599	HIPGA	Square	Ceramic, Metal-Sealed Cofired		12160	No	2.7 V		CMOS		470	2.5	2.5,2.5/3.3 V	Grid Array, Heat Sink/Slug, Interstitial Pitch	SPGA599,47X47	Field Programmable Gate Arrays		Mixed	2.3 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 470 I/O	4	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P599	1	5.08 mm	62.484 mm	No		e0		470	220 °C (428 °F)	62.484 mm		470
5962-9314401MZX	Altera	UV PLD	Military	Pin/Peg	100	PGA	Square	Ceramic, Metal-Sealed Cofired	75 ns		No	5.5 V		CMOS	MIL-STD-883 Class B		5		Grid Array				Macrocell	4.5 V		125 °C (257 °F)	19 Dedicated Inputs, 64 I/O	19	-55 °C (-67 °F)		Perpendicular	S-CPGA-P100				No			22.2 MHz					64
EPF10K70GI503-2	Altera	Loadable PLD	Industrial	Pin/Peg	503	IPGA	Square	Ceramic, Metal-Sealed Cofired	17.2 ns		No	5.25 V		CMOS			5		Grid Array, Interstitial Pitch				Registered	4.75 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 358 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P503		5.077 mm	57.4 mm	No						57.4 mm		358
EPF81188GI232-2	Altera	Loadable PLD	Industrial	Pin/Peg	232	PGA	Square	Ceramic, Metal-Sealed Cofired			No	5.5 V		CMOS			5		Grid Array				Registered	4.5 V	2.54 mm	85 °C (185 °F)	4 Dedicated Inputs, 180 I/O	4	-40 °C (-40 °F)		Perpendicular	S-CPGA-P232		5.207 mm	44.7 mm	No	1188 Flip Flops; 1008 Logic elements; Configurable I/O operation with 3.3 V or 5 V					44.7 mm		180
5962-9316801MXX	Altera	EE PLD	Military	Pin/Peg	160	PGA	Square	Ceramic, Metal-Sealed Cofired	20 ns		No	2.625 V		CMOS	MIL-STD-883		2.5		Grid Array				Macrocell	2.375 V	2.54 mm	125 °C (257 °F)	0 Dedicated Inputs	0	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P160		5.34 mm	39.624 mm	No	192 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e4	62.5 MHz			39.624 mm
EPF81500AGC280-3	Altera	Loadable PLD	Commercial	Pin/Peg	280	PGA	Square	Ceramic, Metal-Sealed Cofired	1.8 ns	1296	No	3.6 V		CMOS		208	3.3	3.3/5,5 V	Grid Array	PGA280,19X19	Field Programmable Gate Arrays		Registered	3 V	2.54 mm	70 °C (158 °F)	4 Dedicated Inputs, 208 I/O	4	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P280	1	5.081 mm	49.78 mm	No	Can also operate at 5 V supply	e0	385 MHz	204	220 °C (428 °F)	49.78 mm		208

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.