68 Programmable Logic Devices (PLD) 419

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
PML2552-35KA	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-CQCC-J68		4.83 mm	24.065 mm	No			50 MHz				24.065 mm		24
5M80ZM68C5N	Intel	Flash PLD	Other	Ball	68	TFBGA	Square	Plastic/Epoxy	14 ns	Yes	1.89 V	64	CMOS			1.8	1.8,1.2/3.3 V	Grid Array, Thin Profile, Fine Pitch	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	85 °C (185 °F)	52 I/O		0 °C (32 °F)	Tin Silver Copper	Bottom	S-PBGA-B68		1.2 mm	5 mm	No		e1	118.3 MHz				5 mm	Yes	52
EPM240ZM68C6N	Intel	Flash PLD	Other	Ball	68	BGA	Rectangular	Plastic/Epoxy	7.9 ns	Yes	1.89 V	192	CMOS		54	1.8	1.5/3.3,1.8 V	Grid Array	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	85 °C (185 °F)	0 Dedicated Inputs	0	0 °C (32 °F)	Tin Silver Copper	Bottom	R-PBGA-B68	3		5 mm	No	It can also operate at 3.3 V	e1			54		5 mm	Yes	54
EPM240ZM68C7N	Intel	Flash PLD	Other	Ball	68	BGA	Rectangular	Plastic/Epoxy	12 ns	Yes	1.89 V	192	CMOS		54	1.8	1.5/3.3,1.8 V	Grid Array	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	85 °C (185 °F)	0 Dedicated Inputs	0	0 °C (32 °F)	Tin Silver Copper	Bottom	R-PBGA-B68	3		5 mm	No	It can also operate at 3.3 V	e1			54		5 mm	Yes	54
5M160ZM68I5N	Intel	Flash PLD	Industrial	Ball	68	TFBGA	Square	Plastic/Epoxy	14 ns	Yes	1.89 V	128	CMOS			1.8	1.2/3.3,1.8 V	Grid Array, Thin Profile, Fine Pitch	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	100 °C (212 °F)	52 I/O		-40 °C (-40 °F)	Tin Silver Copper	Bottom	S-PBGA-B68		1.2 mm	5 mm	No		e1	118.3 MHz				5 mm	Yes	52
5M160ZM68C5N	Intel	Flash PLD	Other	Ball	68	TFBGA	Square	Plastic/Epoxy	14 ns	Yes	1.89 V	128	CMOS			1.8	1.2/3.3,1.8 V	Grid Array, Thin Profile, Fine Pitch	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	85 °C (185 °F)	52 I/O		0 °C (32 °F)	Tin Silver Copper	Bottom	S-PBGA-B68		1.2 mm	5 mm	No		e1	118.3 MHz				5 mm	Yes	52
ISPLSI1024-60LH/883	Lattice Semiconductor	EE PLD	Military	J Bend	68	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.5 V	96	CMOS	MIL-STD-883		5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	2 Dedicated Inputs, 48 I/O	2	-55 °C (-67 °F)		Quad	S-PQCC-J68		4.826 mm	24.13 mm	No	In-System Programmable; 4 External Clocks		38 MHz	30 s		225 °C (437 °F)	24.13 mm	No	48
CY7C342B-25JC	Cypress Semiconductor	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns	Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 52 I/O	7	0 °C (32 °F)	Tin/Lead	Quad	S-PQCC-J68		5.08 mm	24.2316 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	62.5 MHz				24.2316 mm	No	52
ISPLSI1024-60LJI	Lattice Semiconductor	EE PLD	Industrial	No Lead	68	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.5 V	96	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)	Tin/Lead (Sn85Pb15)	Quad	S-PQCC-N68	3	4.57 mm	24.2316 mm	No	In-System Programmable; 4 External Clocks	e0	38 MHz	30 s		225 °C (437 °F)	24.2316 mm	No	48
CY7C342B-30RI	Cypress Semiconductor	UV PLD	Industrial	Pin/Peg	68	WPGA	Square	Ceramic, Metal-Sealed Cofired	60 ns	No	5.5 V	128	CMOS			5	5 V	Grid Array, Window	PGA68,11X11	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P68		5.08 mm	27.9527 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	27.7 MHz				27.9527 mm	No	52
EP1810GM883B	Altera	OT PLD	Military	Pin/Peg	68	PGA	Square	Ceramic	50 ns	No		48	CMOS	38535Q/M;38534H;883B		5	5 V	Grid Array	PGA68,11X11	Programmable Logic Devices	No			2.54 mm	125 °C (257 °F)			-55 °C (-67 °F)	Tin Lead	Perpendicular	S-XPGA-P68				No		e0				220 °C (428 °F)		No
5M240ZM68C5N	Intel	Flash PLD	Other	Ball	68	TFBGA	Square	Plastic/Epoxy	14 ns	Yes	1.89 V	192	CMOS		52	1.8	1.8,1.2/3.3 V	Grid Array, Thin Profile, Fine Pitch	BGA68,9X9,20	Programmable Logic Devices	Yes	Macrocell	1.71 V	.5 mm	85 °C (185 °F)	52 I/O	0	0 °C (32 °F)	Tin Silver Copper	Bottom	S-PBGA-B68		1.2 mm	5 mm	No		e1	118.3 MHz		52		5 mm	Yes	52
ATF1504AS-10JC68	Atmel	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V	64	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 48 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68	3	4.57 mm	24.2316 mm	No	64 Macrocells; In-system programmable; JTAG boundry-scan test circuitry	e0	125 MHz			225 °C (437 °F)	24.2316 mm	Yes	48
CY7C342-30HI	Cypress Semiconductor	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	60 ns	Yes	5.5 V	128	CMOS			5	5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 52 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J68		5.08 mm	24.13 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	27.7 MHz				24.13 mm	No	52
EP1810LC-20T	Altera	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68		5.08 mm	24.23 mm	No	Macrocells Interconnected By Global And/Or Local Bus; 48 Macrocells; 4 External Clocks	e0	50 MHz			220 °C (428 °F)	24.23 mm	No	48
EPM7064LI68-15	Intel	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns	Yes	5.5 V	64	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 52 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68	3	5.08 mm	24.2316 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz				24.2316 mm	No	52
EPM7096LI68-15	Altera	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	15 ns	Yes	5.5 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 52 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J68	3	5.08 mm	24.2316 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	24.2316 mm	No	52
ISPLSI1024-60LJ	Lattice Semiconductor	EE PLD	Commercial	No Lead	68	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.25 V	96	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)	Tin/Lead (Sn85Pb15)	Quad	S-PQCC-N68	3	4.57 mm	24.2316 mm	No	In-System Programmable; 4 External Clocks	e0	38 MHz	30 s		225 °C (437 °F)	24.2316 mm	No	48
PLSI1024-60LJ	Lattice Semiconductor	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	25 ns	Yes	5.25 V	96	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	6 Dedicated Inputs, 48 I/O	6	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68	3	4.57 mm	24.2316 mm	No	4 External Clocks	e0	38 MHz	30 s		225 °C (437 °F)	24.2316 mm	No	48
XC7354-15PC68C	Xilinx	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	32 ns	Yes	5.25 V	54	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	8 Dedicated Inputs, 42 I/O	8	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J68	1	5.08 mm	24.2316 mm	No	54 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 3 External Clocks; 108 Flip Flops	e0	55.6 MHz				24.2316 mm	No	42
XC7372-10WC68I	Xilinx	UV PLD	Industrial	J Bend	68	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	23 ns	Yes	5.5 V	72	CMOS			5	3.3/5,5 V	Chip Carrier, Window	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	10 Dedicated Inputs, 25 I/O	10	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J68	1	4.826 mm	24.13 mm	No	72 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 3 External Clocks; 126 Flip Flops	e0	71.4 MHz				24.13 mm	No	25
EP1810JC-45	Texas Instruments	UV PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-CQCC-J68				No	48 Macrocell; Configurable I/O		33.3 MHz					No	48
EP1830-25CFN	Texas Instruments	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No	F_Max for 12-bit counter application is 40 MHz; Labs interconnected by PIA; 4 Labs; 48 Macrocells						24.2316 mm	No	48
EP1830-30IFN	Texas Instruments	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	34 ns	Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No	F_Max for 12-bit counter applicationsIS 33.3 MHz; Labs interconnected by PIA; 4 Labs; 48 Macrocells						24.2316 mm	No	48
EP1830-30CFN	Texas Instruments	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	34 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No	F_Max for 12-bit counter applicationsIS 33.3 MHz; Labs interconnected by PIA; 4 Labs; 48 Macrocells						24.2316 mm	No	48
EP1830-20CFN	Texas Instruments	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	22 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No	F_Max for 12-bit counter application is 50 MHz; Labs interconnected by PIA; 4 Labs; 48 Macrocells						24.2316 mm	No	48
EP1810JI-45	Texas Instruments	UV PLD	Industrial	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired	50 ns	Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-CQCC-J68				No	48 Macrocell; Configurable I/O		33.3 MHz					No	48
EP1810JC-35	Texas Instruments	UV PLD	Commercial	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-CQCC-J68				No	48 Macrocell; Configurable I/O		40 MHz					No	48
EP1810LC-35	Texas Instruments	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	40 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68				No	48 Macrocell; Configurable I/O		40 MHz					No	48
EP1810LI-45	Texas Instruments	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	50 ns	Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J68				No	48 Macrocell; Configurable I/O		33.3 MHz					No	48
EP1810LC-45	Texas Instruments	OT PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	50 ns	Yes	5.25 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	12 Dedicated Inputs, 48 I/O	12	0 °C (32 °F)		Quad	S-PQCC-J68				No	48 Macrocell; Configurable I/O		33.3 MHz					No	48
EP1830-25IFN	Texas Instruments	OT PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	28 ns	Yes	5.5 V	48	CMOS			5	5 V	Chip Carrier	LDCC68,1.0SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	12 Dedicated Inputs, 48 I/O	12	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No	F_Max for 12-bit counter application is 40 MHz; Labs interconnected by PIA; 4 Labs; 48 Macrocells						24.2316 mm	No	48
PZ5064I12A68-T	NXP Semiconductors	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	14.5 ns	Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			67 MHz				24.2316 mm		48
PZ5064-7A68-T	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			105 MHz				24.2316 mm		48
PML2552-35KA-T	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-CQCC-J68		4.83 mm	24.065 mm	No			50 MHz				24.065 mm		24
PZ5064-7A68	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	10 ns	Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			105 MHz				24.2316 mm		48
PML2552-50KA	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Ceramic, Metal-Sealed Cofired		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-CQCC-J68		4.83 mm	24.065 mm	No			35 MHz				24.065 mm		24
PZ3064-10A68-T	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			80 MHz				24.2316 mm		48
PZ5064-10A68-T	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12.5 ns	Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			77 MHz				24.2316 mm		48
PML2552-35A	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Plastic/Epoxy		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.23 mm	No			50 MHz				24.23 mm		24
PML2552-50A-T	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Plastic/Epoxy		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.23 mm	No			35 MHz				24.23 mm		24
PZ3064I15A68	NXP Semiconductors	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	17.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			58 MHz				24.2316 mm		48
PZ5064I10A68-T	NXP Semiconductors	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12.5 ns	Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			77 MHz				24.2316 mm		48
PZ3064-12A68	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	14.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			67 MHz				24.2316 mm		48
PZ3064I15A68-T	NXP Semiconductors	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	17.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			58 MHz				24.2316 mm		48
PZ3064-10A68	NXP Semiconductors	EE PLD	Commercial	J Bend	68	QCCJ	Square	Plastic/Epoxy	12.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	70 °C (158 °F)	2 Dedicated Inputs, 48 I/O	2	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			80 MHz				24.2316 mm		48
PML2552-50A	NXP Semiconductors	OT PLD	Commercial Extended	J Bend	68	QCCJ	Square	Plastic/Epoxy		Yes	5.25 V		CMOS			5		Chip Carrier				Mixed	4.75 V	1.27 mm	75 °C (167 °F)	9 Dedicated Inputs, 24 I/O	9	0 °C (32 °F)		Quad	S-PQCC-J68		4.57 mm	24.23 mm	No			35 MHz				24.23 mm		24
PZ3064I12A68-T	NXP Semiconductors	EE PLD	Industrial	J Bend	68	QCCJ	Square	Plastic/Epoxy	14.5 ns	Yes	3.63 V		CMOS			3.3		Chip Carrier				Macrocell	2.97 V	1.27 mm	85 °C (185 °F)	2 Dedicated Inputs, 48 I/O	2	-40 °C (-40 °F)		Quad	S-PQCC-J68		4.57 mm	24.2316 mm	No			67 MHz				24.2316 mm		48

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.