84 Programmable Logic Devices (PLD) 597

Reset All

Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPF8452ALM84-4	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPM7128AELI84-12	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	3.6 V	128	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	100 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPF8282VLI84-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes			CMOS			3.3		Chip Carrier				Registered		1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry						29.3116 mm		64
EPM5192LC-2	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPF8282AVLI84-5	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry					220 °C (428 °F)	29.3116 mm		64
EPM7128SLI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	128	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPF8636ALM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V						29.3116 mm		64
EPM7128ALI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	128	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	116.3 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPF10K10LC84-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.5 ns	576	Yes	5.25 V		CMOS		59	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 59 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	576 Logic Elements	e0	71.43 MHz	20 s	59	220 °C (428 °F)	29.3116 mm		59
EPF8452LC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EPF10K10LC84-3N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	0.5 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 59 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic Elements	e3	71.43 MHz				29.3116 mm		59
EPF8636ALI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.5 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0		20 s	64	220 °C (428 °F)	29.3116 mm		64
EPM9320LC84-20N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e3	100 MHz				29.3116 mm		60
EPM5192JM	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.21 mm	No	64
EPM5130LI-2	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.5 V	128	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)		No	48
EPF8452LM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPM7128AELC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	128	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No		e0	98 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EPM7128ALC84-5	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V	128	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V	e0	250 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM5192LC84	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM7096LC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5192LM	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPF8636ALC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.25 V		CMOS		68	5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	504 Logic Elements	e0	417 MHz		64	220 °C (428 °F)	29.3116 mm		68
EPF8282LI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry						29.3116 mm		64
EPM7096SLC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7128SLI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	128	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	64
EPF8452ALC84-4N	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68	5	3.3,3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	336 Logic Elements	e3		30 s	68	245 °C (473 °F)	29.3116 mm		68
EPF8282LC84-2	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.25 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM5192AGM84-20	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	33 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock		66.7 MHz				27.94 mm		64
EPM9400LI84-12	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 59 I/O	0	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V		118 MHz				29.3116 mm		59
EPM9400LC84-15	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	16.2 ns		Yes	5.25 V	400	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 59 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	117.6 MHz			220 °C (428 °F)	29.3116 mm	Yes	59
EPM7128SLI84-6N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes		128	CMOS				3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes			1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J84				No								Yes
EPF8282VLM84-3	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes			CMOS			3.3		Chip Carrier				Registered		1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry						29.3116 mm		64
EPM7160SLI84-10	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	64
EPM5192AJM84-15	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	25 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.21 mm	No	64
EPF8636ALI84-A-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPM7128AELC84-5N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Macrocell	3 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e3	192.3 MHz				29.3116 mm		68
EPF8636ALI84-2	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		504	Yes	5.5 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	504 Logic elements; 63 Labs; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		68
EPM7064SLC84-7N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V	64	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e3	166.7 MHz				29.3116 mm	No	68
EPF8452LM84-2	Altera	Loadable PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	125 °C (257 °F)	4 Dedicated Inputs, 64 I/O	4	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs With Fasttrack Interconnect; 452 Flip Flops; 336 Logic Elements						29.3116 mm		64
EPM5192LC84-1	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	50 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM9320ALC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10.8 ns		Yes	5.25 V	320	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	320 Macrocells; 20 Labs; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	144.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	60
EPX880LC84-12	Altera	Flash PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	14 ns	80	Yes	5.25 V		CMOS		62	5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz		62	220 °C (428 °F)	29.3116 mm		60
EPF8282ALI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	5.5 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPF8636ALI84-4N	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e3					29.3116 mm		64
EPM5192G5962-2	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns		No	5.5 V		CMOS			5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock		40 MHz				27.94 mm		64
EPM5192ALM84-20	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz			220 °C (428 °F)	29.3116 mm	No	64
5962-9206202MYC	Altera	UV PLD	Military	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	45 ns		No	5.5 V		CMOS	MIL-STD-883		5		Grid Array, Window				Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Gold	Perpendicular	S-CPGA-P84		3.81 mm	27.94 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e4	40 MHz				27.94 mm		64
EPM5192JC-1	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	40 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin/Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	50 MHz	30 s		220 °C (428 °F)	29.21 mm	No	64

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.