84 Programmable Logic Devices (PLD) 597

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM7160LC84-15	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	160	CMOS		5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	160 Macrocells; Shared Input/Clock	e0	76.9 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7096LI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.5 V	96	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	96 Macrocells	e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM7128ELC84-15	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	128	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	128 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	100 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	68
EPM7128SLC84-6F	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	128	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	166.7 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM9320ALI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	8.2 ns		Yes	5.5 V	320	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 56 I/O	4	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells	e0				220 °C (428 °F)	29.3116 mm	Yes	56
EPM7128ELI84-12	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.5 V	128	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells	e0	125 MHz			220 °C (428 °F)	29.3116 mm	No	68
EPM5130AJC-20	Altera	UV PLD	Commercial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	33 ns		Yes	5.25 V		CMOS		5		Chip Carrier, Window				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock		66.7 MHz				29.21 mm		48
EPM5130JM	Altera	UV PLD	Military	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	128	CMOS		5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.21 mm	No	48
EPM7096SLI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	96	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	76.9 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPF8282ALI84-A-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS		3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPM7160ELC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	160	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	64
EPF8282ALC84-A-4	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS		3.3		Chip Carrier				Registered	3 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPF8282ALC84-4H	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS		5		Chip Carrier				Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic Elements						29.3116 mm		68
EPM7064LI84-15H	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V		CMOS		5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No			100 MHz				29.3116 mm		68
EPM7064SLC84-5	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes	5.25 V	64	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	64 Macrocells	e0	250 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EPM5130LC-2	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	45 ns		Yes	5.25 V	128	CMOS		5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	19 Dedicated Inputs, 48 I/O	19	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)		No	48
EPM5130LM	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V	128	CMOS		5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	19 Dedicated Inputs, 48 I/O	19	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz			220 °C (428 °F)	29.3116 mm	No	48
EPF8452ALI84-A-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS		3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPX780LC84-15	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	18 ns	80	Yes	5.25 V		CMOS	62	5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	50 MHz		62	220 °C (428 °F)	29.3116 mm		60
EPM5192LM84	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS		5		Chip Carrier				Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				29.3116 mm		64
EPM7160ELI84-10P	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS		5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	60

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.