84 Programmable Logic Devices (PLD) 597

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Part	Manufacturer	Programmable IC Type	Grading Of Temperature	Form Of Terminal	No. of Terminals	Package Code	Package Shape	Package Body Material	Propagation Delay	No. of Logic Cells	Surface Mount	Maximum Supply Voltage	No. of Macro Cells	Technology Used	Screening Level	No. of Inputs	Nominal Supply Voltage (V)	Power Supplies (V)	Package Style (Meter)	Package Equivalence Code	Sub-Category	In-System Programmable	Output Function	Minimum Supply Voltage	Pitch Of Terminal	Maximum Operating Temperature	Organization	No. of Dedicated Inputs	Minimum Operating Temperature	Finishing Of Terminal Used	Position Of Terminal	JESD-30 Code	Moisture Sensitivity Level (MSL)	Maximum Seated Height	Width	Qualification	Additional Features	JESD-609 Code	Maximum Clock Frequency	Maximum Time At Peak Reflow Temperature (s)	No. of Outputs	Peak Reflow Temperature (C)	Length	JTAG Boundary Scan Test	No. of I/O Lines
EPM7064SLI84-5N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	5 ns		Yes		64	CMOS				3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes			1.27 mm	85 °C (185 °F)			-40 °C (-40 °F)		Quad	S-PQCC-J84				No								No
EPM5192LC	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin/Lead	Quad	S-PQCC-J84				No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	33.3 MHz	30 s		220 °C (428 °F)		No	64
EPM7160SLI84-10N	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e3	125 MHz				29.3116 mm	Yes	64
EPM7160ELC84-12	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	12 ns		Yes	5.25 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	64
EPF8282ALI84-A-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPF8452ALC84-A-4	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.9 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPM5192JI84	Altera	UV PLD	Industrial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V		CMOS			5		Chip Carrier, Window				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)		Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				29.21 mm		64
EPM7160ELI84-10	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.5 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 60 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM9400LC84-20	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23.2 ns		Yes	5.25 V	400	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 59 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	Yes	59
EPM7064AELI84-10	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	64	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	64 Macrocells	e0	125 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM7160ELC84-7	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V		125 MHz				29.3116 mm		60
EPM7128SVLC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	3.6 V	128	CMOS			3.3	3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	Yes	64
EPF8282VLC84-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		208	Yes	3.6 V		CMOS		68	3.3	3.3 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	3 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM5192ALC84-15	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5192ALI84-15	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM5192JI	Altera	UV PLD	Industrial	J Bend	84	WQCCJ	Square	Ceramic, Metal-Sealed Cofired	55 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier, Window	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-CQCC-J84		5.08 mm	29.21 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	29.21 mm	No	64
EPM5192GC	Altera	UV PLD	Commercial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.25 V	192	CMOS			5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.75 V	2.54 mm	70 °C (158 °F)	7 Dedicated Inputs, 64 I/O	7	0 °C (32 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	28.45 mm	No	Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock	e0	40 MHz			220 °C (428 °F)	28.45 mm	No	64
5962-9206201MYX	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	90 ns		No	5.5 V	192	CMOS	MIL-STD-883 Class B		5	5 V	Grid Array	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84		4.96 mm	28.45 mm	No			19.6 MHz			220 °C (428 °F)	28.45 mm	No	64
EPM9320ALC84-7	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	8.2 ns		Yes	5.25 V	320	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 56 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells	e0				220 °C (428 °F)	29.3116 mm	Yes	56
EPF10K20LC84-5	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.25 V		CMOS			5		Chip Carrier				Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	1152 Logic elements; Built-in JTAG boundry-scan test circuitry		53.76 MHz				29.3116 mm
EPX780LC84-12	Altera	OT PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns	80	Yes	5.25 V		CMOS		62	5	5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	8 Labs; 80 Macrocells Configurable I/O operation with 3.3 V or 5 V	e0	58.8 MHz		62	220 °C (428 °F)	29.3116 mm		60
5962-9206202MZX	Altera	UV PLD	Military	Pin/Peg	84	PGA	Square	Ceramic, Metal-Sealed Cofired	59 ns		No	5.5 V		CMOS	MIL-STD-883 Class B		5		Grid Array				Macrocell	4.5 V		125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)		Perpendicular	S-CPGA-P84				No			27.7 MHz						64
EPM9320ALI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	16 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 56 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	320 Macrocells						29.3116 mm		56
EPM7064SLC84-6	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	64	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 68 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	200 MHz	20 s		220 °C (428 °F)	29.3116 mm	Yes	68
EPF10K20LI84-4	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23.8 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	1152 Logic elements; Built-in JTAG boundry-scan test circuitry		60.6 MHz				29.3116 mm
EPM5192ALM84-15	Altera	OT PLD	Military	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	125 °C (257 °F)	7 Dedicated Inputs, 64 I/O	7	-55 °C (-67 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	83.3 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM7128LC84-10	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	10 ns		Yes	5.25 V	128	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPF8452ALC84-6	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM7128ELI84-20	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V	128	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	2	5.08 mm	29.3116 mm	No	128 Macrocells; Configurable I/O operation with 3.3 V or 5 V; 2 External Clocks; Shared Input/Clock	e0	83.3 MHz	20 s		220 °C (428 °F)	29.3116 mm	No	68
EPF10K10LI84-5	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	27 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	576 Logic elements; Built-in JTAG boundry-scan test circuitry		53.76 MHz				29.3116 mm
EPF8452ALI84-A-3	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 68 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPF8282ALC84-2A	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.25 V		CMOS			5		Chip Carrier				Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	208 Logic Elements					220 °C (428 °F)	29.3116 mm		68
EPF8452ALC84-A-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	1.8 ns		Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 68 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Can also operate at 5 V supply						29.3116 mm		68
EPF8452LC84-3	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy		336	Yes	5.25 V		CMOS		68	5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Field Programmable Gate Arrays		Registered	4.75 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	452 Flip Flops; 336 Logic elements; Configurable I/O operation with 3.3 V or 5 V	e0			64	220 °C (428 °F)	29.3116 mm		64
EPM7128LI84-20	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	20 ns		Yes	5.5 V	128	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock	e0	62.5 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM7128AELI84-7	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	3.6 V	128	CMOS			3.3	2.5/3.3,3.3 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	3 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 68 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0	129.9 MHz			220 °C (428 °F)	29.3116 mm	Yes	68
EPM7096LI84-15	Altera	EE PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.5 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	0 Dedicated Inputs, 64 I/O	0	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84	3	5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	100 MHz			220 °C (428 °F)	29.3116 mm	No	64
EPM7096SLC84-7	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	7.5 ns		Yes	5.25 V	96	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Configurable I/O operation with 3.3 V or 5 V	e0	125 MHz			220 °C (428 °F)	29.3116 mm	No	60
EPM7160SLC84-6N	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	6 ns		Yes	5.25 V	160	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Matte Tin	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	160 Macrocells; 10 Labs; Configurable I/O operation with 3.3 V or 5 V	e3	166.7 MHz				29.3116 mm	Yes	64
EPF8282AVLC84-5	Altera	Loadable PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	3.6 V		CMOS			3.3		Chip Carrier				Registered	3 V	1.27 mm	70 °C (158 °F)	4 Dedicated Inputs, 64 I/O	4	0 °C (32 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry					220 °C (428 °F)	29.3116 mm		64
EPM7096LC84	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	25 ns		Yes	5.25 V	96	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0				220 °C (428 °F)	29.3116 mm	No	64
EPF8636ALI84-5	Altera	Loadable PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy			Yes	5.5 V		CMOS			5		Chip Carrier				Registered	4.5 V	1.27 mm	85 °C (185 °F)	4 Dedicated Inputs, 64 I/O	4	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V						29.3116 mm		64
EPM5192LI84-1	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	40 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	192 Macrocells; 12 Labs		62.5 MHz				29.3116 mm		64
EPM9320LC84-20H	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	23 ns		Yes	5.25 V	320	CMOS			5	3.3/5,5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	Yes	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 60 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0				220 °C (428 °F)	29.3116 mm	Yes	60
EPM7096JC84-2	Altera	EE PLD	Commercial	J Bend	84	QCCJ	Square	Plastic/Epoxy	15 ns		Yes	5.25 V	96	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.75 V	1.27 mm	70 °C (158 °F)	0 Dedicated Inputs, 64 I/O	0	0 °C (32 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No		e0				220 °C (428 °F)	29.3116 mm	No	64
EPM5192GI84	Altera	UV PLD	Industrial	Pin/Peg	84	WPGA	Square	Ceramic, Metal-Sealed Cofired	55 ns		No	5.5 V	192	CMOS			5	5 V	Grid Array, Window	PGA84M,11X11	Programmable Logic Devices	No	Macrocell	4.5 V	2.54 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Perpendicular	S-CPGA-P84	1	4.96 mm	28.448 mm	No	192 Macrocells; Shared Input/Clock; Shared Product Terms	e0	33.3 MHz			220 °C (428 °F)	28.448 mm	No	64
EPM5130LI84	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	55 ns		Yes	5.5 V		CMOS			5		Chip Carrier				Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	19 Dedicated Inputs, 48 I/O	19	-40 °C (-40 °F)		Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	128 Macrocells; Shared Input/Clock; Shared Product Terms		33.3 MHz				29.3116 mm		48
EPM5192ALI84-20	Altera	OT PLD	Industrial	J Bend	84	QCCJ	Square	Plastic/Epoxy	33 ns		Yes	5.5 V	192	CMOS			5	5 V	Chip Carrier	LDCC84,1.2SQ	Programmable Logic Devices	No	Macrocell	4.5 V	1.27 mm	85 °C (185 °F)	7 Dedicated Inputs, 64 I/O	7	-40 °C (-40 °F)	Tin Lead	Quad	S-PQCC-J84		5.08 mm	29.3116 mm	No	Labs interconnected by PIA; 12 Labs; 1 External Clock	e0	66.7 MHz			220 °C (428 °F)	29.3116 mm	No	64

Programmable Logic Devices (PLD)

Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.

PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.

PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.