Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Package Body Material | Propagation Delay | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of Macro Cells | Technology Used | Screening Level | No. of Inputs | Architecture | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | In-System Programmable | Output Function | Minimum Supply Voltage | No. of Product Terms | Pitch Of Terminal | Maximum Operating Temperature | Organization | No. of Dedicated Inputs | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length | JTAG Boundary Scan Test | No. of I/O Lines |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Altera |
Loadable PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
23.8 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.5 V |
1.27 mm |
125 °C (257 °F) |
4 Dedicated Inputs |
4 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
576 Logic elements; Built-in JTAG boundry-scan test circuitry |
60.6 MHz |
29.3116 mm |
|||||||||||||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
125 MHz |
29.3116 mm |
64 |
|||||||||||||||||||||
Altera |
OT PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
55 ns |
Yes |
5.5 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
No |
Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
33.3 MHz |
220 °C (428 °F) |
No |
64 |
||||||||||||||
Altera |
UV PLD |
Industrial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
55 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier, Window |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
-40 °C (-40 °F) |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
128 Macrocells; Shared Input/Clock; Shared Product Terms |
33.3 MHz |
29.21 mm |
48 |
||||||||||||||||||||
Altera |
UV PLD |
Military |
Pin/Peg |
84 |
WPGA |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
No |
192 |
CMOS |
MIL-STD-883 Class B (Modified) |
5 |
5 V |
Grid Array, Window |
PGA84M,11X11 |
Programmable Logic Devices |
No |
Macrocell |
2.54 mm |
125 °C (257 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
-55 °C (-67 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P84 |
4.96 mm |
28.45 mm |
No |
Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
40 MHz |
220 °C (428 °F) |
28.45 mm |
No |
64 |
||||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
15 ns |
Yes |
5.25 V |
96 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
100 MHz |
220 °C (428 °F) |
29.3116 mm |
No |
64 |
||||||||||
Altera |
OT PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
33 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
66.7 MHz |
29.3116 mm |
48 |
||||||||||||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
6 ns |
Yes |
5.25 V |
96 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 60 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
151.5 MHz |
220 °C (428 °F) |
29.3116 mm |
No |
60 |
|||||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
6 ns |
Yes |
5.5 V |
160 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
160 Macrocells |
e0 |
200 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
64 |
|||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.25 V |
96 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Tin/Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
125 MHz |
30 s |
220 °C (428 °F) |
29.3116 mm |
No |
64 |
|||||||||
Altera |
Loadable PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
1.9 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Registered |
3 V |
1.27 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 68 I/O |
4 |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Can also operate at 5 V supply |
29.3116 mm |
68 |
|||||||||||||||||||||
Altera |
UV PLD |
Commercial |
Pin/Peg |
84 |
WPGA |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
No |
5.25 V |
192 |
CMOS |
5 |
5 V |
Grid Array, Window |
PGA84M,11X11 |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P84 |
1 |
4.96 mm |
28.45 mm |
No |
Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
50 MHz |
220 °C (428 °F) |
28.45 mm |
No |
64 |
||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
25 ns |
Yes |
5.25 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 12 Labs; 1 External Clock |
e0 |
83.3 MHz |
220 °C (428 °F) |
29.21 mm |
No |
64 |
|||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.25 V |
64 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
2 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
125 MHz |
20 s |
220 °C (428 °F) |
29.3116 mm |
No |
68 |
|||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier, Window |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
0 °C (32 °F) |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
128 Macrocells; Shared Input/Clock; Shared Product Terms |
40 MHz |
29.21 mm |
48 |
||||||||||||||||||||
|
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
7.5 ns |
Yes |
5.25 V |
160 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e3 |
166.7 MHz |
29.3116 mm |
Yes |
64 |
|||||||||||
Altera |
Loadable PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
27 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.75 V |
1.27 mm |
70 °C (158 °F) |
4 Dedicated Inputs |
4 |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
576 Logic elements; Built-in JTAG boundry-scan test circuitry |
53.76 MHz |
29.3116 mm |
|||||||||||||||||||||
Altera |
UV PLD |
Military |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier, Window |
Macrocell |
4.5 V |
1.27 mm |
125 °C (257 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
-55 °C (-67 °F) |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
40 MHz |
29.21 mm |
48 |
||||||||||||||||||||
Altera |
EE PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.5 V |
1.27 mm |
125 °C (257 °F) |
0 Dedicated Inputs, 55 I/O |
0 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
320 Macrocells; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V |
118 MHz |
29.3116 mm |
55 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
55 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier, Window |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
192 Macrocells; Shared Input/Clock; Shared Product Terms |
33.3 MHz |
29.21 mm |
64 |
||||||||||||||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
7.5 ns |
Yes |
3.6 V |
64 |
CMOS |
3.3 |
2.5/3.3,3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
64 Macrocells |
e0 |
166.7 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
68 |
|||||||||||
Altera |
EE PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.5 V |
1.27 mm |
125 °C (257 °F) |
0 Dedicated Inputs, 59 I/O |
0 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
400 Macrocells; 580 Flip Flops; Configurable I/O operation with 3.3 V or 5 V |
118 MHz |
29.3116 mm |
59 |
||||||||||||||||||||
Altera |
Loadable PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
23.8 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.5 V |
1.27 mm |
125 °C (257 °F) |
4 Dedicated Inputs |
4 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
1152 Logic elements; Built-in JTAG boundry-scan test circuitry |
60.6 MHz |
29.3116 mm |
|||||||||||||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
Yes |
5.25 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
50 MHz |
220 °C (428 °F) |
29.21 mm |
No |
64 |
|||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
12 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
125 MHz |
29.3116 mm |
68 |
|||||||||||||||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
6 ns |
Yes |
3.6 V |
128 |
CMOS |
3.3 |
2.5/3.3,3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
128 Macrocells |
e0 |
144.9 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
68 |
|||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
15 ns |
Yes |
5.25 V |
160 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 60 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
76.9 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
60 |
|||||||||||
Altera |
Loadable PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.5 V |
1.27 mm |
125 °C (257 °F) |
4 Dedicated Inputs, 64 I/O |
4 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
636 Flip Flops; 504 Logic elements; Configurable I/O operation with 3.3 V or 5 V |
29.3116 mm |
64 |
||||||||||||||||||||||
Altera |
Loadable PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
208 |
Yes |
3.6 V |
CMOS |
68 |
3.3 |
3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
Registered |
3 V |
1.27 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 64 I/O |
4 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
282 Flip Flops; 208 Logic elements; Built-in JTAG boundry-scan test circuitry |
e0 |
64 |
220 °C (428 °F) |
29.3116 mm |
64 |
|||||||||||||
|
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
10 ns |
Yes |
5.25 V |
160 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Matte Tin/Copper |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e2 |
125 MHz |
40 s |
245 °C (473 °F) |
29.3116 mm |
Yes |
64 |
||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
5 ns |
Yes |
3.6 V |
128 |
CMOS |
3.3 |
2.5/3.3,3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
e0 |
192.3 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
68 |
||||||||||||
Altera |
UV PLD |
Military |
Pin/Peg |
84 |
WPGA |
Square |
Ceramic, Metal-Sealed Cofired |
55 ns |
No |
5.5 V |
CMOS |
5 |
Grid Array, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.96 mm |
27.94 mm |
No |
192 Macrocells; Shared Input/Clock; Shared Product Terms |
33.3 MHz |
27.94 mm |
64 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
40 ns |
Yes |
5.25 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
192 Macrocells; Shared Input/Clock; Shared Product Terms |
e0 |
50 MHz |
220 °C (428 °F) |
29.21 mm |
No |
64 |
|||||||||||
Altera |
UV PLD |
Military |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
33 ns |
Yes |
5.5 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.5 V |
1.27 mm |
125 °C (257 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 12 Labs; 1 External Clock |
e0 |
66.7 MHz |
220 °C (428 °F) |
29.21 mm |
No |
64 |
|||||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
10.8 ns |
Yes |
5.5 V |
320 |
CMOS |
60 |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 60 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
320 Macrocells; 20 Labs; 484 Flip Flops; Configurable I/O operation with 3.3 V or 5 V |
e0 |
144.9 MHz |
60 |
220 °C (428 °F) |
29.3116 mm |
Yes |
60 |
||||||||
Altera |
Loadable PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
208 |
Yes |
5.25 V |
CMOS |
68 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
Registered |
4.75 V |
1.27 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 68 I/O |
4 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
208 Logic Elements |
e0 |
417 MHz |
20 s |
64 |
220 °C (428 °F) |
29.3116 mm |
68 |
||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
20 ns |
Yes |
5.25 V |
96 |
CMOS |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 64 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
e0 |
220 °C (428 °F) |
29.3116 mm |
No |
64 |
|||||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
40 ns |
Yes |
5.25 V |
128 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
128 Macrocells; Shared Input/Clock; Shared Product Terms |
e0 |
50 MHz |
220 °C (428 °F) |
29.21 mm |
No |
48 |
|||||||||||
Altera |
UV PLD |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
40 ns |
No |
5.25 V |
192 |
CMOS |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
2.54 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P84 |
1 |
No |
Labs interconnected by PIA; 12 Labs; 192 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
50 MHz |
220 °C (428 °F) |
No |
64 |
|||||||||||||
Altera |
Loadable PLD |
Military |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
27 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.5 V |
1.27 mm |
125 °C (257 °F) |
4 Dedicated Inputs |
4 |
-55 °C (-67 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
576 Logic elements; Built-in JTAG boundry-scan test circuitry |
53.76 MHz |
29.3116 mm |
|||||||||||||||||||||
Altera |
Flash PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
10 ns |
80 |
Yes |
5.25 V |
CMOS |
62 |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 60 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
95.2 MHz |
62 |
220 °C (428 °F) |
29.3116 mm |
60 |
|||||||||||
Altera |
UV PLD |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
25 ns |
No |
5.5 V |
CMOS |
5 |
Grid Array |
Macrocell |
4.5 V |
85 °C (185 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
-40 °C (-40 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P84 |
No |
e0 |
62.5 MHz |
64 |
|||||||||||||||||||||||
|
Altera |
Loadable PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Registered |
4.75 V |
1.27 mm |
70 °C (158 °F) |
4 Dedicated Inputs, 68 I/O |
4 |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
504 Logic Elements |
e3 |
29.3116 mm |
68 |
||||||||||||||||||
Altera |
EE PLD |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
7.5 ns |
Yes |
3.6 V |
128 |
CMOS |
3.3 |
2.5/3.3,3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
Yes |
Macrocell |
3 V |
1.27 mm |
70 °C (158 °F) |
0 Dedicated Inputs, 68 I/O |
0 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
128 Macrocells; 8 Labs; Configurable I/O operation with 2.5 V or 3.3 V |
e0 |
116.3 MHz |
220 °C (428 °F) |
29.3116 mm |
Yes |
68 |
|||||||||||
Altera |
UV PLD |
Military |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
55 ns |
Yes |
5.5 V |
CMOS |
5 |
Chip Carrier, Window |
Macrocell |
4.5 V |
1.27 mm |
125 °C (257 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
-55 °C (-67 °F) |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
128 Macrocells; Shared Input/Clock; Shared Product Terms |
33.3 MHz |
29.21 mm |
48 |
||||||||||||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
33 ns |
Yes |
5.25 V |
192 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
7 Dedicated Inputs, 64 I/O |
7 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 12 Labs; 1 External Clock |
e0 |
66.7 MHz |
220 °C (428 °F) |
29.21 mm |
No |
64 |
|||||||||||
Altera |
EE PLD |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
15 ns |
Yes |
5.5 V |
160 |
CMOS |
5 |
3.3/5,5 V |
Chip Carrier |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
0 Dedicated Inputs, 60 I/O |
0 |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Configurable I/O operation with 3.3 V or 5 V |
e0 |
76.9 MHz |
220 °C (428 °F) |
29.3116 mm |
No |
60 |
|||||||||||
Altera |
UV PLD |
Commercial |
J Bend |
84 |
WQCCJ |
Square |
Ceramic, Metal-Sealed Cofired |
40 ns |
Yes |
5.25 V |
128 |
CMOS |
5 |
5 V |
Chip Carrier, Window |
LDCC84,1.2SQ |
Programmable Logic Devices |
No |
Macrocell |
4.75 V |
1.27 mm |
70 °C (158 °F) |
19 Dedicated Inputs, 48 I/O |
19 |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQCC-J84 |
5.08 mm |
29.21 mm |
No |
Labs interconnected by PIA; 8 Labs; 128 Macrocells; 1 External Clock; Shared Input/Clock |
e0 |
50 MHz |
220 °C (428 °F) |
29.21 mm |
No |
48 |
Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.
PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.