Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
144 |
CMOS |
2000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
e3 |
125 MHz |
27.94 mm |
||||||||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
144 |
Yes |
5.5 V |
144 |
CMOS |
74 |
2000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
3.3 ns |
144 CLBS, 2000 Gates |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 3000 Logic gates |
e0 |
227 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
324 |
Yes |
5.5 V |
324 |
CMOS |
144 |
6000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
324 CLBS, 6000 Gates |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
e0 |
166 MHz |
30 s |
144 |
225 °C (437 °F) |
29.3116 mm |
||||||||||
Xilinx |
FPGA |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
144 |
Yes |
3.6 V |
144 |
CMOS |
74 |
2000 |
3.3 |
3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
3 V |
1.27 mm |
70 °C (158 °F) |
2.7 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Typical gates = 2000-3000 |
e0 |
270 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
224 |
Yes |
5.25 V |
224 |
CMOS |
70 |
3500 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
2.7 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 4500 Logic gates |
e0 |
270 MHz |
30 s |
70 |
225 °C (437 °F) |
29.3116 mm |
|||||
|
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
324 |
CMOS |
10000 |
5 |
Chip Carrier |
4.5 V |
1.27 mm |
4.6 ns |
324 CLBS, 10000 Gates |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
MAX available 16000 Logic gates |
e3 |
83 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||||
|
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
144 |
CMOS |
2000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
4.1 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
Max usable 3000 Logic gates |
e3 |
135 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||
Xilinx |
FPGA |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
144 |
Yes |
5.5 V |
144 |
CMOS |
74 |
2000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
85 °C (185 °F) |
5.1 ns |
144 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 3000 Logic gates |
e0 |
113 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
224 |
Yes |
5.25 V |
224 |
CMOS |
70 |
3500 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
1.5 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 4500 Logic gates |
e0 |
370 MHz |
30 s |
70 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
144 |
Yes |
5.25 V |
144 |
CMOS |
74 |
2000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
5.5 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e0 |
125 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
320 |
Yes |
5.5 V |
320 |
CMOS |
70 |
5000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
85 °C (185 °F) |
3.3 ns |
320 CLBS, 5000 Gates |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
4.699 mm |
29.3116 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
e0 |
230 MHz |
30 s |
70 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
64 |
Yes |
CMOS |
64 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
1.27 mm |
70 °C (158 °F) |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
No |
e0 |
325 MHz |
30 s |
64 |
225 °C (437 °F) |
|||||||||||||||
|
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
100 |
No |
5.25 V |
100 |
CMOS |
74 |
1500 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
85 °C (185 °F) |
4.1 ns |
100 CLBS, 1500 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 1500-2000 |
135 MHz |
74 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
144 |
No |
CMOS |
38535Q/M;38534H;883B |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P84 |
No |
50 MHz |
74 |
|||||||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
224 |
CMOS |
3500 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
9 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
688 flip-flops; typical gates = 3500-4500 |
e0 |
70 MHz |
29.3116 mm |
||||||||||||||
|
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
100 |
No |
5.5 V |
100 |
CMOS |
74 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
85 °C (185 °F) |
8 ns |
100 CLBS, 1000 Gates |
-40 °C (-40 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
174 flip-flops; typical gates = 1000-1500 |
100 MHz |
74 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Industrial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
64 |
CMOS |
2000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
85 °C (185 °F) |
64 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
e3 |
50 MHz |
27.94 mm |
|||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
224 |
Yes |
5.25 V |
224 |
CMOS |
70 |
3500 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
2.2 ns |
224 CLBS, 3500 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 4500 Logic gates |
e0 |
323 MHz |
30 s |
70 |
225 °C (437 °F) |
29.3116 mm |
|||||
|
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
324 |
CMOS |
10000 |
5 |
Chip Carrier |
4.5 V |
1.27 mm |
3 ns |
324 CLBS, 10000 Gates |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Typical gates = 10000-16000 |
e3 |
83 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
196 |
Yes |
5.25 V |
196 |
CMOS |
112 |
3000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
2.7 ns |
196 CLBS, 3000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 5000 Logic gates |
e0 |
111 MHz |
30 s |
112 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
100 |
Yes |
5.25 V |
100 |
CMOS |
74 |
2000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
70 °C (158 °F) |
4.1 ns |
100 CLBS, 2000 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
4.699 mm |
29.3116 mm |
No |
MAX 80 I/OS; 360 flip-flops; typical gates = 2000 - 2700 |
e0 |
190 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
2688 |
CMOS |
8700 |
5 |
Chip Carrier |
4.5 V |
1.27 mm |
85 °C (185 °F) |
5.5 ns |
2688 CLBS, 8700 Gates |
-40 °C (-40 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
MAX 61 I/OS; MAX 1344 flip-flops; OTP based |
29.3116 mm |
|||||||||||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
CMOS |
3.3 |
Chip Carrier |
1.27 mm |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
70 MHz |
29.3116 mm |
||||||||||||||||||||||||||
Xilinx |
FPGA |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
224 |
CMOS |
6400 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
70 °C (158 °F) |
224 CLBS, 6400 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
4.699 mm |
29.3116 mm |
No |
MAX 70 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
e0 |
50 MHz |
29.3116 mm |
|||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
196 |
Yes |
5.25 V |
196 |
CMOS |
112 |
3000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
1.6 ns |
196 CLBS, 3000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 5000 Logic gates |
e0 |
125 MHz |
30 s |
112 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
64 |
CMOS |
1000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
9 ns |
64 CLBS, 1000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
e3 |
70 MHz |
27.94 mm |
||||||||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
196 |
CMOS |
3000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
196 CLBS, 3000 Gates |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
Typical gates = 3000-9000 |
29.3116 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
144 |
CMOS |
2000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
5.5 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
125 MHz |
29.3116 mm |
||||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
196 |
Yes |
3.6 V |
196 |
CMOS |
112 |
3000 |
3.3 |
3.3 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
3 V |
1.27 mm |
85 °C (185 °F) |
1 ns |
196 CLBS, 3000 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
MAXIMUM usable gates 10000 |
e0 |
250 MHz |
30 s |
112 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
324 |
Yes |
5.5 V |
324 |
CMOS |
144 |
6000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
1.6 ns |
324 CLBS, 6000 Gates |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 8000 Logic gates |
e0 |
125 MHz |
30 s |
144 |
225 °C (437 °F) |
29.3116 mm |
||||||||
Xilinx |
FPGA |
Commercial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
100 |
Yes |
5.25 V |
100 |
CMOS |
74 |
1000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
70 °C (158 °F) |
15 ns |
100 CLBS, 1000 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
4.699 mm |
29.3116 mm |
No |
MAX 74 I/OS; 174 flip-flops; typical gates = 1000 - 1500 |
e0 |
50 MHz |
30 s |
74 |
225 °C (437 °F) |
29.3116 mm |
|||||
|
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
3.6 V |
196 |
CMOS |
3000 |
3.3 |
Chip Carrier |
3 V |
1.27 mm |
1.3 ns |
196 CLBS, 3000 Gates |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 5000 Logic gates |
e3 |
200 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||||
|
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.25 V |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.75 V |
2.54 mm |
70 °C (158 °F) |
2.7 ns |
64 CLBS, 1000 Gates |
0 °C (32 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 1000-1500 |
270 MHz |
64 |
27.94 mm |
|||||||||
|
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
320 |
CMOS |
5000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
1.75 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
Max usable 6000 Logic gates |
e3 |
323 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
320 |
CMOS |
5000 |
5 |
Chip Carrier |
4.5 V |
1.27 mm |
9 ns |
320 CLBS, 5000 Gates |
Tin Lead |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
e0 |
70 MHz |
29.3116 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
320 |
CMOS |
5000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
5.1 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
Max usable 6000 Logic gates |
e3 |
113 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
770 |
Yes |
5.25 V |
324 |
CMOS |
61 |
6500 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
4.5 ns |
324 CLBS, 6500 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
936 flip-flops; typical gates = 6500-8000 |
e0 |
133.3 MHz |
30 s |
61 |
225 °C (437 °F) |
29.3116 mm |
|||||
|
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
196 |
CMOS |
6000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
5.6 ns |
196 CLBS, 6000 Gates |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
MAX available 10000 Logic gates |
e3 |
83 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
||||||||||
Xilinx |
FPGA |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
64 |
Yes |
5.5 V |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.5 V |
1.27 mm |
4.1 ns |
64 CLBS, 1000 Gates |
Tin Lead |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Typical gates = 1000-1500 |
e0 |
188 MHz |
30 s |
64 |
225 °C (437 °F) |
29.3116 mm |
||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
100 |
Yes |
5.25 V |
100 |
CMOS |
80 |
2000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
1.6 ns |
100 CLBS, 2000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 3000 Logic gates |
e0 |
125 MHz |
30 s |
80 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Industrial |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.5 V |
384 |
CMOS |
1248 |
5 |
Chip Carrier |
4.5 V |
1.27 mm |
85 °C (185 °F) |
5.5 ns |
384 CLBS, 1248 Gates |
-40 °C (-40 °F) |
Quad |
S-PQCC-J84 |
5.08 mm |
29.3116 mm |
No |
MAX 61 I/OS; MAX 192 flip-flops; OTP based |
29.3116 mm |
|||||||||||||||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
196 |
Yes |
5.25 V |
196 |
CMOS |
112 |
3000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
2 ns |
196 CLBS, 3000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 5000 Logic gates |
e0 |
125 MHz |
30 s |
112 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
400 |
Yes |
5.25 V |
400 |
CMOS |
160 |
7000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
1.3 ns |
400 CLBS, 7000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 10000 Logic gates |
e0 |
166 MHz |
30 s |
160 |
225 °C (437 °F) |
29.3116 mm |
|||||
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
320 |
Yes |
5.25 V |
320 |
CMOS |
70 |
5000 |
5 |
5 V |
Chip Carrier |
LDCC84,1.2SQ |
Field Programmable Gate Arrays |
4.75 V |
1.27 mm |
85 °C (185 °F) |
3.3 ns |
320 CLBS, 5000 Gates |
0 °C (32 °F) |
Tin/Lead (Sn85Pb15) |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
No |
Max usable 6000 Logic gates |
e0 |
227 MHz |
30 s |
70 |
225 °C (437 °F) |
29.3116 mm |
|||||
|
Xilinx |
FPGA |
Other |
J Bend |
84 |
QCCJ |
Square |
Plastic/Epoxy |
Yes |
5.25 V |
144 |
CMOS |
2000 |
5 |
Chip Carrier |
4.75 V |
1.27 mm |
85 °C (185 °F) |
2.2 ns |
144 CLBS, 2000 Gates |
0 °C (32 °F) |
Matte Tin |
Quad |
S-PQCC-J84 |
3 |
5.08 mm |
29.3116 mm |
Max usable 3000 Logic gates |
e3 |
323 MHz |
30 s |
245 °C (473 °F) |
29.3116 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
100 |
No |
CMOS |
38535Q/M;38534H;883B |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P84 |
No |
50 MHz |
74 |
|||||||||||||||||||
Xilinx |
FPGA |
Commercial |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
144 |
No |
CMOS |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
70 °C (158 °F) |
0 °C (32 °F) |
Perpendicular |
S-XPGA-P84 |
No |
70 MHz |
74 |
||||||||||||||||||||
Xilinx |
FPGA |
Other |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.25 V |
64 |
CMOS |
1000 |
5 |
Grid Array |
4.75 V |
2.54 mm |
85 °C (185 °F) |
5.5 ns |
64 CLBS, 1000 Gates |
0 °C (32 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
e3 |
125 MHz |
27.94 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.