Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
MIL-PRF-38535 Class Q |
4200 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
14 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
50 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
400 |
CMOS |
8000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.65 mm |
125 °C (257 °F) |
400 CLBS, 8000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F196 |
2.921 mm |
34.29 mm |
No |
1120 flip-flops; typical gates = 8000-10000 |
34.29 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 Class Q |
10000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 30000 |
e0 |
166 MHz |
39.37 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
1368 |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 Class Q |
192 |
10000 |
3.3 |
3.3 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 30000 |
e4 |
166 MHz |
192 |
39.37 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
14 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
6912 |
Yes |
2.625 V |
1536 |
CMOS |
MIL-PRF-38535 Class Q |
162 |
322970 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
322970 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.0226 mm |
39.37 mm |
Yes |
e4 |
162 |
39.37 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e4 |
39.37 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
320 |
CMOS |
142 |
5000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
1 |
3.302 mm |
28.702 mm |
No |
Typical gates = 5000-6000 |
e0 |
188 MHz |
142 |
28.702 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
Yes |
2.625 V |
3456 |
CMOS |
661111 |
2.5 |
Flatpack, Guard Ring |
2.375 V |
.635 mm |
125 °C (257 °F) |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Matte Tin |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e3 |
39.37 mm |
|||||||||||||||
Xilinx |
FPGA |
Industrial |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
85 °C (185 °F) |
9 ns |
64 CLBS, 2000 Gates |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
e0 |
70 MHz |
17.272 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
9 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Commercial |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.25 V |
320 |
CMOS |
9000 |
5 |
Flatpack |
4.75 V |
.635 mm |
70 °C (158 °F) |
320 CLBS, 9000 Gates |
0 °C (32 °F) |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
MAX 142 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
27.432 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
950 |
Yes |
5.5 V |
400 |
CMOS |
MIL-STD-883 Class B |
160 |
8000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK196,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.65 mm |
125 °C (257 °F) |
6 ns |
400 CLBS, 8000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F196 |
1 |
3.302 mm |
28.702 mm |
No |
1120 flip-flops; typical gates = 8000-10000 |
e0 |
69 MHz |
160 |
28.702 mm |
||||||
|
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
2700 |
Yes |
2.625 V |
600 |
CMOS |
MIL-PRF-38535 |
162 |
108904 |
2.5 |
Flatpack, Guard Ring |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
600 CLBS, 108904 Gates |
-55 °C (-67 °F) |
Matte Tin |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e3 |
162 |
39.37 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
196 |
CMOS |
MIL-STD-883 Class B |
4000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.65 mm |
125 °C (257 °F) |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
616 flip-flops; typical gates = 4000-5000 |
28.702 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
3136 |
CMOS |
MIL-PRF-38535 Class Q |
55000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.3 ns |
3136 CLBS, 55000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
200 MHz |
39.37 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
320 |
CMOS |
MIL-STD-883 |
142 |
5000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
Typical gates = 5000-6000 |
e4 |
188 MHz |
142 |
28.702 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Yes |
5.5 V |
64 |
CMOS |
MIL-STD-883 |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-XQFP-F100 |
3.68 mm |
17.27 mm |
No |
e4 |
25 MHz |
17.27 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
9 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
5472 |
Yes |
3.6 V |
2304 |
CMOS |
MIL-PRF-38535 Class Q |
192 |
40000 |
3.3 |
3.3 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
2304 CLBS, 40000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 130000 |
e4 |
166 MHz |
192 |
39.37 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
1024 |
MIL-PRF-38535 Class Q |
15000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.635 mm |
125 °C (257 °F) |
3.9 ns |
1024 CLBS, 15000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 15000-45000 |
39.37 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
576 |
MIL-STD-883 Class B |
13000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.65 mm |
125 °C (257 °F) |
576 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
39.37 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
9 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
320 |
CMOS |
MIL-STD-883 Class B |
142 |
5000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
1 |
3.302 mm |
28.702 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e0 |
70 MHz |
142 |
28.702 mm |
||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
15552 |
Yes |
2.625 V |
3456 |
CMOS |
MIL-PRF-38535 Class Q |
162 |
661111 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
661111 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.0226 mm |
39.37 mm |
Yes |
e4 |
162 |
39.37 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
4200 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
MAX 82 I/OS; 480 flip-flops; power-down supplier current = 3 µA @ VCC = 3.2 V & T = 25°C |
e0 |
70 MHz |
17.272 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Yes |
5.5 V |
320 |
CMOS |
MIL-STD-883 |
9000 |
5 |
Flatpack |
4.5 V |
1.27 mm |
125 °C (257 °F) |
14 ns |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-XQFP-F164 |
2.92 mm |
No |
e4 |
16 MHz |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
MIL-PRF-38535 Class Q |
4200 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
5.5 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
125 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
1296 |
CMOS |
MIL-PRF-38535 Class Q |
22000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 65000 |
166 MHz |
39.37 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
2700 |
Yes |
2.625 V |
600 |
CMOS |
MIL-PRF-38535 |
162 |
108904 |
2.5 |
1.5/3.3,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
600 CLBS, 108904 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
162 |
39.37 mm |
|||||||||
Xilinx |
FPGA |
Commercial |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.25 V |
144 |
CMOS |
4200 |
5 |
Flatpack |
4.75 V |
.635 mm |
70 °C (158 °F) |
5.5 ns |
144 CLBS, 4200 Gates |
0 °C (32 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
MAX 82 I/OS; 480 flip-flops |
e0 |
125 MHz |
17.272 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
576 |
CMOS |
10000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 30000 |
e0 |
166 MHz |
39.37 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
5.5 V |
64 |
CMOS |
38535Q/M;38534H;883B |
64 |
2000 |
5 |
5 V |
Flatpack |
QFL100,.7SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
14 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
1 |
3.683 mm |
17.272 mm |
No |
MAX 64 I/OS; 256 flip-flops |
e0 |
50 MHz |
64 |
17.272 mm |
||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
466 |
Yes |
196 |
CMOS |
MIL-STD-883 |
112 |
4000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK164,2.5SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
112 |
28.702 mm |
||||||||||||
Xilinx |
FPGA |
Industrial |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
5.5 V |
320 |
CMOS |
142 |
9000 |
5 |
5 V |
Flatpack |
QFL164,1.2SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
85 °C (185 °F) |
9 ns |
320 CLBS, 9000 Gates |
-40 °C (-40 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
1 |
3.683 mm |
27.432 mm |
No |
MAX 142 I/OS; 928 flip-flops |
e0 |
70 MHz |
142 |
27.432 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
19.05 mm |
|||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
950 |
Yes |
CMOS |
MIL-STD-883 |
160 |
5 |
5 V |
Flatpack, Guard Ring |
QFL196,1.4SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F196 |
3.302 mm |
28.702 mm |
No |
e4 |
77 MHz |
160 |
28.702 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
238 |
Yes |
CMOS |
MIL-STD-883 |
77 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
90.9 MHz |
77 |
19.05 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
MIL-PRF-38535 Class Q |
4200 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
7 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
100 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 Class Q |
10000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 30000 |
e0 |
166 MHz |
39.37 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
64 |
CMOS |
64 |
1300 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
64 CLBS, 1300 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
1 |
2.921 mm |
19.05 mm |
No |
MAX 64 I/OS; 256 flip-flops; typical gates = 1300 - 1800 |
190 MHz |
64 |
19.05 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.