Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Package Body Material | Propagation Delay | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of Macro Cells | Technology Used | Screening Level | No. of Inputs | Architecture | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | In-System Programmable | Output Function | Minimum Supply Voltage | No. of Product Terms | Pitch Of Terminal | Maximum Operating Temperature | Organization | No. of Dedicated Inputs | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length | JTAG Boundary Scan Test | No. of I/O Lines |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
NXP Semiconductors |
OT PLD |
Industrial |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.9662 mm |
No |
Programmable Output Polarity |
18 MHz |
8.9662 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
10 ns |
Yes |
5.25 V |
TTL |
5 |
Chip Carrier |
Mixed |
4.75 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 2 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
Power-Up Reset |
60.6 MHz |
8.965 mm |
2 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
12 ns |
No |
5.25 V |
TTL |
18 |
PLA-TYPE |
5 |
5 V |
In-Line |
DIP20,.3 |
Programmable Logic Devices |
Combinatorial |
4.75 V |
42 |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
No |
Programmable Output Polarity |
10 |
10 |
|||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
7 ns |
No |
3.6 V |
BICMOS |
3.3 |
In-Line |
Macrocell |
3 V |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.2 mm |
7.62 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
111 MHz |
26.73 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
40 ns |
Yes |
5.5 V |
CMOS |
5 |
Small Outline |
Macrocell |
4.5 V |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
18 MHz |
12.8 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
40 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline |
Macrocell |
3 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
Programmable Output Polarity |
22 MHz |
12.8 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
UV PLD |
Military |
Through-Hole |
20 |
WDIP |
Rectangular |
Ceramic, Glass-Sealed |
30 ns |
No |
5.5 V |
CMOS |
5 |
In-Line, Window |
Macrocell |
4.5 V |
2.54 mm |
125 °C (257 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-55 °C (-67 °F) |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
25 MHz |
8 |
||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline, Thin Profile, Shrink Pitch |
Macrocell |
3 V |
.65 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
Programmable Output Polarity |
18 MHz |
6.5 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
35 ns |
Yes |
5.25 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline |
SOP20,.4 |
Programmable Logic Devices |
Macrocell |
4.75 V |
74 |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
21 MHz |
8 |
12.8 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
8 ns |
Yes |
5.25 V |
BICMOS |
5 |
Chip Carrier |
Combinatorial |
4.75 V |
75 °C (167 °F) |
10 Dedicated Inputs, 6 I/O |
10 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
No |
6 |
||||||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
40 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Macrocell |
3 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.9662 mm |
No |
Programmable Output Polarity |
22 MHz |
8.9662 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
10 ns |
No |
5.25 V |
TTL |
5 |
In-Line |
Mixed |
4.75 V |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 2 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.06 mm |
7.62 mm |
No |
Power-Up Reset |
60.6 MHz |
26.695 mm |
2 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
30 ns |
Yes |
5.25 V |
TTL |
5 |
Chip Carrier |
Combinatorial |
4.75 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
Programmable Output Polarity |
8.965 mm |
10 |
|||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
25 ns |
Yes |
5.25 V |
CMOS |
5 |
Small Outline, Thin Profile, Shrink Pitch |
Macrocell |
4.75 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
8 Macrocell; Power Up Reset; Shared Input/Clock |
30 MHz |
6.5 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
40 ns |
Yes |
5.5 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline, Thin Profile, Shrink Pitch |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
74 |
.65 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
18 MHz |
8 |
6.5 mm |
8 |
||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
15 ns |
No |
5.25 V |
TTL |
18 |
PLA-TYPE |
5 |
5 V |
In-Line |
DIP20,.3 |
Programmable Logic Devices |
Combinatorial |
4.75 V |
42 |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
No |
Programmable Output Polarity |
10 |
10 |
|||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
25 ns |
No |
5.25 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
In-Line |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
74 |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.2 mm |
7.62 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
30 MHz |
8 |
26.73 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
25 ns |
Yes |
5.5 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Chip Carrier |
DIP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
74 |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
18 MHz |
8 |
8.965 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
7.5 ns |
Yes |
3.6 V |
BICMOS |
3.3 |
Small Outline |
Macrocell |
3 V |
1.27 mm |
8 Dedicated Inputs, 9 I/O |
8 |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; 1 External Clock; 5 V compatile Inputs & I/O; Register Preload; Power-up reset |
105 MHz |
12.8 mm |
9 |
|||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
10 ns |
No |
5.25 V |
TTL |
5 |
In-Line |
Combinatorial |
4.75 V |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
No |
Programmable Output Polarity |
10 |
|||||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
10 ns |
Yes |
5.25 V |
TTL |
5 |
Chip Carrier |
Combinatorial |
4.75 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
Programmable Output Polarity |
8.965 mm |
10 |
|||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Military |
Through-Hole |
20 |
DIP |
Rectangular |
Ceramic |
No |
TTL |
38535Q/M;38534H;883B |
8 |
PAL-TYPE |
5 |
5 V |
In-Line |
DIP20,.3 |
Programmable Logic Devices |
Registered |
64 |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Lead |
Dual |
R-XDIP-T20 |
No |
e0 |
50 MHz |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Military |
No Lead |
20 |
QCCN |
Square |
Ceramic, Metal-Sealed Cofired |
45 ns |
Yes |
5.5 V |
Bipolar |
MIL-STD-883 |
5 |
Chip Carrier |
Combinatorial |
4.5 V |
125 °C (257 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
-55 °C (-67 °F) |
Quad |
S-CQCC-N20 |
No |
10 |
|||||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline, Thin Profile, Shrink Pitch |
Macrocell |
2.7 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
21 MHz |
6.5 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
25 ns |
Yes |
5.25 V |
CMOS |
5 |
Chip Carrier |
Macrocell |
4.75 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
30 MHz |
8.965 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
40 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Macrocell |
3 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.9662 mm |
No |
Programmable Output Polarity |
22 MHz |
8.9662 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
10 ns |
No |
5.25 V |
TTL |
5 |
In-Line |
Mixed |
4.75 V |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 2 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.06 mm |
7.62 mm |
No |
Power-Up Reset |
74 MHz |
26.695 mm |
2 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
30 ns |
No |
5.25 V |
TTL |
5 |
In-Line |
Combinatorial |
4.75 V |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.06 mm |
7.62 mm |
No |
Programmable Output Polarity |
26.695 mm |
10 |
|||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Through-Hole |
20 |
DIP |
Rectangular |
Plastic/Epoxy |
40 ns |
No |
3.6 V |
CMOS |
3.3 |
In-Line |
Macrocell |
3 V |
2.54 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDIP-T20 |
4.2 mm |
7.62 mm |
No |
Programmable Output Polarity |
22 MHz |
26.73 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
25 ns |
Yes |
5.25 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline, Thin Profile, Shrink Pitch |
TSSOP20,.25 |
Programmable Logic Devices |
Macrocell |
4.75 V |
74 |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
8 Macrocell; Power Up Reset; Shared Input/Clock |
30 MHz |
8 |
6.5 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Macrocell |
2.7 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.9662 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
21 MHz |
8.9662 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
UV PLD |
Industrial |
Through-Hole |
20 |
DIP |
Rectangular |
Ceramic, Glass-Sealed |
25 ns |
No |
5.5 V |
CMOS |
5 |
In-Line |
Macrocell |
4.5 V |
2.54 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-GDIP-T20 |
5.08 mm |
7.62 mm |
No |
8 Macrocells; 1 External Clock; Shared Input/Clock; Register Preload; Power-Up Reset |
30 MHz |
24.305 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
40 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline, Shrink Pitch |
Macrocell |
3 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
Programmable Output Polarity |
22 MHz |
7.2 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Military |
Through-Hole |
20 |
DIP |
Rectangular |
Ceramic, Glass-Sealed |
45 ns |
No |
5.5 V |
Bipolar |
MIL-STD-883 |
5 |
In-Line |
Combinatorial |
4.5 V |
125 °C (257 °F) |
8 Dedicated Inputs, 10 I/O |
8 |
-55 °C (-67 °F) |
Tin Lead |
Dual |
R-GDIP-T20 |
No |
e0 |
10 |
|||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline, Shrink Pitch |
Macrocell |
2.7 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
21 MHz |
7.2 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
Programmable Output Polarity |
18 MHz |
12.8 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Chip Carrier |
Macrocell |
3 V |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.9662 mm |
No |
Programmable Output Polarity |
18 MHz |
8.9662 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
25 ns |
Yes |
5.5 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline, Shrink Pitch |
SSOP20,.3 |
Programmable Logic Devices |
Macrocell |
4.5 V |
74 |
.65 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
8 Macrocell; Power Up Reset; Shared Input/Clock |
30 MHz |
8 |
7.2 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
35 ns |
Yes |
5.25 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline, Shrink Pitch |
SSOP20,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
74 |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
21 MHz |
8 |
7.2 mm |
8 |
||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
7 ns |
Yes |
3.6 V |
BICMOS |
3.3 |
Small Outline, Shrink Pitch |
Macrocell |
3 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
111 MHz |
7.2 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
35 ns |
Yes |
5.25 V |
CMOS |
5 |
Small Outline, Thin Profile, Shrink Pitch |
Macrocell |
4.75 V |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
6.5 mm |
8 |
||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
TSSOP |
Rectangular |
Plastic/Epoxy |
40 ns |
Yes |
5.5 V |
CMOS |
5 |
Small Outline, Thin Profile, Shrink Pitch |
Macrocell |
4.5 V |
.65 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
1.1 mm |
4.4 mm |
No |
18 MHz |
6.5 mm |
8 |
|||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SSOP |
Rectangular |
Plastic/Epoxy |
25 ns |
Yes |
5.25 V |
CMOS |
18 |
PAL-TYPE |
5 |
5 V |
Small Outline, Shrink Pitch |
SSOP20,.3 |
Programmable Logic Devices |
Macrocell |
4.75 V |
74 |
.65 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2 mm |
5.3 mm |
No |
8 Macrocell; Power Up Reset; Shared Input/Clock |
30 MHz |
8 |
7.2 mm |
8 |
|||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
7 ns |
Yes |
3.6 V |
BICMOS |
3.3 |
Small Outline |
Macrocell |
3 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
111 MHz |
12.8 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
10 ns |
Yes |
5.25 V |
TTL |
5 |
Chip Carrier |
Mixed |
4.75 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 4 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
4.57 mm |
8.965 mm |
No |
Power-Up Reset |
60.6 MHz |
8.965 mm |
4 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
45 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline |
Macrocell |
2.7 V |
1.27 mm |
75 °C (167 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
0 °C (32 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
21 MHz |
12.8 mm |
8 |
||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Commercial Extended |
J Bend |
20 |
QCCJ |
Square |
Plastic/Epoxy |
8 ns |
Yes |
5.25 V |
BICMOS |
5 |
Chip Carrier |
Mixed |
4.75 V |
75 °C (167 °F) |
8 Dedicated Inputs, 2 I/O |
8 |
0 °C (32 °F) |
Quad |
S-PQCC-J20 |
No |
Register Preload; Power-Up Reset |
118 MHz |
2 |
||||||||||||||||||||||||
NXP Semiconductors |
OT PLD |
Industrial |
Gull Wing |
20 |
SOP |
Rectangular |
Plastic/Epoxy |
50 ns |
Yes |
3.6 V |
CMOS |
3.3 |
Small Outline |
Macrocell |
2.7 V |
1.27 mm |
85 °C (185 °F) |
8 Dedicated Inputs, 8 I/O |
8 |
-40 °C (-40 °F) |
Dual |
R-PDSO-G20 |
2.65 mm |
7.5 mm |
No |
8 Macrocells; Register Preload; Power-Up Reset; 1 External Clock; Shared Input/Clock |
17 MHz |
12.8 mm |
8 |
Programmable Logic Devices (PLDs) are digital circuits that are designed to be programmed by the user to perform specific logic functions. They consist of an array of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes PLDs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
PLDs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the PLD hardware. The resulting configuration data is then loaded onto the PLD, allowing it to perform the desired logic functions.
PLDs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.