Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
1368 |
Yes |
5.5 V |
576 |
CMOS |
192 |
10000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2.7 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 10000-30000 |
e0 |
111 MHz |
192 |
39.37 mm |
||||||||
|
Xilinx |
FPGA |
Military |
Ball |
575 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.575 V |
1280 |
CMOS |
1000000 |
1.5 |
Grid Array |
1.425 V |
1.27 mm |
125 °C (257 °F) |
0.44 ns |
1280 CLBS, 1000000 Gates |
-55 °C (-67 °F) |
Tin Silver Copper |
Bottom |
S-PBGA-B575 |
2.6 mm |
31 mm |
No |
e1 |
650 MHz |
31 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
352 |
LBGA |
Square |
Plastic/Epoxy |
6912 |
Yes |
2.625 V |
1536 |
CMOS |
38535Q/M;38534H;883B |
260 |
322970 |
2.5 |
1.2/3.6,2.5 V |
Grid Array, Low Profile |
BGA352,26X26,50 |
Field Programmable Gate Arrays |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Tin/Lead (Sn63Pb37) |
Bottom |
S-PBGA-B352 |
3 |
1.7 mm |
35 mm |
No |
e0 |
30 s |
260 |
225 °C (437 °F) |
35 mm |
||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
1024 |
MIL-PRF-38535 Class Q |
15000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
3.9 ns |
1024 CLBS, 15000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P299 |
4.318 mm |
52.324 mm |
No |
Typical gates = 15000-45000 |
52.324 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
64 |
CMOS |
1000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
2.921 mm |
19.05 mm |
No |
256 flip-flops; typical gates = 1000-1500; power-down supplier current = 50 µA |
50 MHz |
19.05 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
560 |
HCGA |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
2.625 V |
6144 |
CMOS |
MIL-PRF-38535 Class Q |
1124022 |
2.5 |
Grid Array, Heat Sink/Slug |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
6144 CLBS, 1124022 Gates |
-55 °C (-67 °F) |
Gold |
Bottom |
S-CBGA-X560 |
4.9 mm |
42.5 mm |
No |
e4 |
42.5 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
144 |
CMOS |
2000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
2.921 mm |
19.05 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
50 MHz |
19.05 mm |
|||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
784 |
CMOS |
13000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
e3 |
166 MHz |
47.244 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
676 |
BGA |
Square |
Plastic/Epoxy |
406720 |
Yes |
1.03 V |
31775 |
HKMG |
400 |
1 |
Grid Array |
.97 V |
1 mm |
125 °C (257 °F) |
0.74 ns |
31775 CLBS |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B676 |
4 |
3.37 mm |
27 mm |
e0 |
30 s |
400 |
225 °C (437 °F) |
27 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
238 |
Yes |
CMOS |
MIL-STD-883 |
77 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
6 ns |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
90.9 MHz |
77 |
19.05 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
MIL-PRF-38535 Class Q |
4200 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
7 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
100 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
e0 |
50 MHz |
17.272 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B1761 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
9 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
64 |
CMOS |
1000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
e3 |
100 MHz |
27.94 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
CMOS |
MIL-STD-883 |
64 |
2000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
7 ns |
2000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
e4 |
100 MHz |
64 |
27.94 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
MIL-PRF-38535 Class Q |
2000 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
70 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
144 |
CMOS |
MIL-STD-883 Class B |
2000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
50 MHz |
19.05 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
1148 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
CMOS |
Grid Array |
BGA1148,34X34,40 |
1.14 V |
1 mm |
125 °C (257 °F) |
0.78 ns |
-55 °C (-67 °F) |
Bottom |
S-PBGA-B1148 |
3.4 mm |
35 mm |
35 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
9 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B1761 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
784 |
BGA |
Square |
Plastic/Epoxy |
128000 |
Yes |
10000 |
CMOS |
400 |
Grid Array |
BGA784,28X28,40 |
1 mm |
125 °C (257 °F) |
0.85 ns |
10000 CLBS |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B784 |
3.17 mm |
29 mm |
e0 |
400 |
29 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
68 |
PGA |
Square |
Ceramic |
64 |
No |
CMOS |
58 |
5 |
5 V |
Grid Array |
PGA68,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P68 |
No |
33 MHz |
58 |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
256 |
BGA |
Square |
Plastic/Epoxy |
2700 |
Yes |
2.625 V |
600 |
CMOS |
MIL-PRF-38535 |
180 |
108904 |
2.5 |
1.5/3.3,2.5 V |
Grid Array |
BGA256,20X20,50 |
Field Programmable Gate Arrays |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
600 CLBS, 108904 Gates |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B256 |
3 |
2.55 mm |
27 mm |
No |
e0 |
30 s |
180 |
225 °C (437 °F) |
27 mm |
||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
1296 |
CMOS |
MIL-PRF-38535 |
22000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 22000 to 65000 |
166 MHz |
39.37 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
484 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.03 V |
75900 |
1 |
Grid Array |
.97 V |
125 °C (257 °F) |
75900 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B484 |
4 |
No |
e1 |
30 s |
250 °C (482 °F) |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
196 |
MIL-PRF-38535 Class Q |
3000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
3.9 ns |
196 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
Typical gates = 3000-9000 |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
Yes |
CMOS |
MIL-STD-883 |
82 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
70 MHz |
82 |
19.05 mm |
||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
196 |
No |
5.5 V |
196 |
CMOS |
112 |
4000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
6 ns |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P156 |
3.683 mm |
42.164 mm |
No |
616 flip-flops; typical gates = 4000-5000 |
e3 |
90.9 MHz |
112 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Military |
Ball |
432 |
LBGA |
Square |
Plastic/Epoxy |
6912 |
Yes |
2.625 V |
1536 |
CMOS |
MIL-PRF-38535 |
316 |
322970 |
2.5 |
1.2/3.6,2.5 V |
Grid Array, Low Profile |
BGA432,31X31,50 |
Field Programmable Gate Arrays |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Tin/Lead (Sn63Pb37) |
Bottom |
S-PBGA-B432 |
3 |
1.7 mm |
40 mm |
No |
e0 |
30 s |
316 |
225 °C (437 °F) |
40 mm |
||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
320 |
CMOS |
38535Q/M;38534H;883B |
142 |
5000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
1 |
2.921 mm |
28.702 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
142 |
28.702 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic |
100 |
No |
CMOS |
38535Q/M;38534H;883B |
74 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P84 |
No |
50 MHz |
74 |
|||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
120 |
PGA |
Square |
Ceramic |
238 |
No |
CMOS |
38535Q/M;38534H;883B |
80 |
5 |
5 V |
Grid Array |
PGA120,13X13 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P120 |
No |
90.9 MHz |
80 |
||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
Yes |
2.625 V |
1536 |
CMOS |
322970 |
2.5 |
Flatpack, Guard Ring |
2.375 V |
.635 mm |
125 °C (257 °F) |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Matte Tin |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e3 |
39.37 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
484 |
CMOS |
MIL-STD-883 |
6500 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
Typical gates = 6500-7500 |
e4 |
188 MHz |
28.702 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
64 |
CMOS |
1000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
2.921 mm |
19.05 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
70 MHz |
19.05 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
MIL-PRF-38535 Class Q |
2000 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
5.5 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
125 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
320 |
CMOS |
9000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
MAX 142 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
27.432 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
196 |
CMOS |
3000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
196 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
125 MHz |
42.164 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
224 |
CMOS |
6400 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
224 CLBS, 6400 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
MAX 110 I/OS; 688 flip-flops; power-down supplier current = 4 µA @ VCC = 3.2 V & T = 25°C |
50 MHz |
37.084 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
1024 |
MIL-PRF-38535 Class Q |
15000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.635 mm |
125 °C (257 °F) |
3.9 ns |
1024 CLBS, 15000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 15000-45000 |
39.37 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
6912 |
Yes |
2.625 V |
1536 |
CMOS |
316 |
322970 |
2.5 |
1.5/3.3,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
316 |
39.37 mm |
||||||||||
Xilinx |
FPGA |
Military |
Ball |
432 |
LBGA |
Square |
Plastic/Epoxy |
15552 |
Yes |
1.89 V |
3456 |
CMOS |
38535Q/M;38534H;883B |
316 |
985882 |
1.8 |
1.2/3.6,1.8 V |
Grid Array, Low Profile |
BGA432,31X31,50 |
Field Programmable Gate Arrays |
1.71 V |
1.27 mm |
125 °C (257 °F) |
3456 CLBS, 985882 Gates |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B432 |
3 |
1.7 mm |
40 mm |
No |
e0 |
357.2 MHz |
30 s |
316 |
225 °C (437 °F) |
40 mm |
||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
1024 |
CMOS |
18000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.65 mm |
125 °C (257 °F) |
1024 CLBS, 18000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
39.37 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.