Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Military |
1752 |
CGA |
Square |
1M Rad(Si) |
Ceramic, Metal-Sealed Cofired |
Yes |
1.05 V |
10240 |
CMOS |
1 |
Grid Array |
.95 V |
1 mm |
125 °C (257 °F) |
10240 CLBS |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-CBGA-X1752 |
9.6 mm |
45 mm |
e0 |
45 mm |
|||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
68 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
5.5 V |
64 |
CMOS |
58 |
600 |
5 |
5 V |
Grid Array |
PGA68,11X11 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
15 ns |
64 CLBS, 600 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P68 |
4.064 mm |
27.94 mm |
No |
122 flip-flops; typical gates = 600-1000 |
50 MHz |
58 |
27.94 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
14 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
50 MHz |
37.084 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
MIL-STD-883 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
37.084 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
6 ns |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Gull Wing |
240 |
FQFP |
Square |
Plastic/Epoxy |
Yes |
3.6 V |
1296 |
CMOS |
22000 |
3.3 |
Flatpack, Fine Pitch |
3 V |
.5 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Quad |
S-PQFP-G240 |
4.1 mm |
32 mm |
No |
Typical gates = 22000 to 65000 |
166 MHz |
32 mm |
||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1157 |
BGA |
Square |
Plastic/Epoxy |
Yes |
91050 |
Grid Array |
1 mm |
125 °C (257 °F) |
91050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1157 |
4 |
35 mm |
No |
e1 |
30 s |
245 °C (473 °F) |
35 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
MIL-STD-883 |
5000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
100 MHz |
42.164 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
484 |
BGA |
Square |
Plastic/Epoxy |
Yes |
91050 |
Grid Array |
125 °C (257 °F) |
91050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B484 |
4 |
No |
e1 |
30 s |
250 °C (482 °F) |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
MIL-STD-883 |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
e4 |
188 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
6912 |
Yes |
2.625 V |
1536 |
CMOS |
316 |
322970 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
QFP228(UNSPEC) |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
316 |
39.37 mm |
||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
484 |
BGA |
Square |
Plastic/Epoxy |
Yes |
91050 |
Grid Array |
125 °C (257 °F) |
91050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B484 |
4 |
No |
e1 |
30 s |
250 °C (482 °F) |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
64 |
CMOS |
1000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
7 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
2.921 mm |
19.05 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
e0 |
100 MHz |
19.05 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
3136 |
CMOS |
MIL-PRF-38535 Class Q |
55000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.3 ns |
3136 CLBS, 55000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
200 MHz |
39.37 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
5.5 V |
CMOS |
MIL-STD-883 |
142 |
9000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
9000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
2.921 mm |
28.702 mm |
No |
e4 |
100 MHz |
142 |
28.702 mm |
||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
7 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e3 |
100 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
15552 |
Yes |
2.625 V |
3456 |
CMOS |
MIL-PRF-38535 Class Q |
316 |
661111 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
316 |
39.37 mm |
|||||||||
Xilinx |
FPGA |
Military |
Gull Wing |
240 |
FQFP |
Square |
Plastic/Epoxy |
5472 |
Yes |
3.6 V |
2304 |
CMOS |
MIL-PRF-38535 Class N |
193 |
40000 |
3.3 |
3.3 V |
Flatpack, Fine Pitch |
HQFP240,1.37SQ,20 |
Field Programmable Gate Arrays |
3 V |
.5 mm |
125 °C (257 °F) |
1.6 ns |
2304 CLBS, 40000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-PQFP-G240 |
4.1 mm |
32 mm |
No |
Maximum usable gates 130000 |
e0 |
166 MHz |
193 |
32 mm |
|||||||
|
Xilinx |
FPGA |
Military |
Ball |
484 |
BGA |
Square |
Plastic/Epoxy |
Yes |
91050 |
Grid Array |
125 °C (257 °F) |
91050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B484 |
4 |
No |
e1 |
30 s |
250 °C (482 °F) |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
5.5 V |
CMOS |
MIL-STD-883 |
64 |
2000 |
5 |
5 V |
Flatpack |
QFL100,.7SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.683 mm |
17.27 mm |
No |
e4 |
100 MHz |
64 |
17.27 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
27.94 mm |
||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
Yes |
5.5 V |
144 |
CMOS |
MIL-STD-883 |
82 |
4200 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
7 ns |
4200 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.2258 mm |
19.05 mm |
No |
e4 |
100 MHz |
82 |
19.05 mm |
||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
120 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
100 |
CMOS |
2000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
100 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P120 |
4.318 mm |
34.544 mm |
No |
e3 |
166 MHz |
34.544 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
784 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.03 V |
75900 |
1 |
Grid Array |
.97 V |
125 °C (257 °F) |
75900 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B784 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
|||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
784 |
BGA |
Square |
Plastic/Epoxy |
Yes |
229050 |
Grid Array |
125 °C (257 °F) |
229050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B784 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
466 |
Yes |
CMOS |
MIL-STD-883 |
112 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK164,2.5SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
112 |
28.702 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
7 ns |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
19.05 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
Yes |
144 |
CMOS |
82 |
2000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
1 |
3.429 mm |
19.05 mm |
No |
Typical gates = 2000-3000 |
e0 |
188 MHz |
82 |
19.05 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
28.702 mm |
||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
CMOS |
MIL-STD-883 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
27.94 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
665 |
BGA |
Square |
Plastic/Epoxy |
71680 |
Yes |
1.05 V |
6080 |
CMOS |
360 |
1 |
1,2.5 V |
Grid Array |
BGA665,26X26,40 |
Field Programmable Gate Arrays |
.95 V |
1 mm |
125 °C (257 °F) |
0.9 ns |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B665 |
2.9 mm |
27 mm |
No |
e0 |
1098 MHz |
360 |
27 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
19.05 mm |
|||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
950 |
Yes |
5.5 V |
400 |
CMOS |
160 |
8000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK196,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.65 mm |
125 °C (257 °F) |
6 ns |
400 CLBS, 8000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F196 |
1 |
2.921 mm |
34.29 mm |
No |
1120 flip-flops; typical gates = 8000-10000 |
e0 |
90.9 MHz |
160 |
34.29 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Yes |
5.5 V |
64 |
CMOS |
MIL-STD-883 |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
14 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-XQFP-F100 |
3.68 mm |
17.27 mm |
No |
e4 |
16 MHz |
17.27 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Rectangular |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
64 |
CMOS |
MIL-STD-883 |
2000 |
5 |
Grid Array |
4.5 V |
125 °C (257 °F) |
14 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
R-CPGA-P84 |
No |
e4 |
16 MHz |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
432 |
LBGA |
Square |
Plastic/Epoxy |
Yes |
2.625 V |
CMOS |
661111 |
2.5 |
Grid Array, Low Profile |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
661111 Gates |
-55 °C (-67 °F) |
Bottom |
S-PBGA-B432 |
1.7 mm |
40 mm |
Yes |
40 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
466 |
No |
5.5 V |
196 |
CMOS |
MIL-PRF-38535 Class Q |
112 |
3000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
3.9 ns |
196 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
Typical gates = 3000-9000 |
e4 |
111 MHz |
112 |
42.164 mm |
|||||||
Xilinx |
FPGA |
Military |
Ball |
1759 |
BGA |
Square |
Plastic/Epoxy |
241152 |
Yes |
1.05 V |
18840 |
CMOS |
720 |
1 |
Grid Array |
BGA1759,42X42,40 |
.95 V |
1 mm |
125 °C (257 °F) |
0.67 ns |
18840 CLBS |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B1759 |
4 |
4.37 mm |
42.5 mm |
e0 |
720 |
42.5 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
2432 |
Yes |
5.5 V |
CMOS |
MIL-PRF-38535 Class Q |
192 |
28000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2.2 ns |
28000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.0226 mm |
39.68 mm |
No |
e4 |
143 MHz |
192 |
39.68 mm |
|||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
4.318 mm |
37.084 mm |
No |
Typical gates = 2000-3000 |
188 MHz |
37.084 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
784 |
CMOS |
13000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
125 MHz |
47.244 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
CMOS |
MIL-STD-883 |
142 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
190 MHz |
142 |
28.702 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
144 |
CMOS |
MIL-PRF-38535 Class Q |
4200 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
9 ns |
144 CLBS, 4200 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
70 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
1296 |
CMOS |
MIL-PRF-38535 Class Q |
22000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 65000 |
166 MHz |
39.37 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
1738 |
BGA |
Square |
Plastic/Epoxy |
102400 |
Yes |
1.05 V |
8960 |
CMOS |
680 |
1 |
1,2.5 V |
Grid Array |
BGA1738,42X42,40 |
Field Programmable Gate Arrays |
.95 V |
1 mm |
125 °C (257 °F) |
0.9 ns |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B1738 |
3.5 mm |
42.5 mm |
No |
e0 |
1098 MHz |
680 |
42.5 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
5472 |
Yes |
3.6 V |
2304 |
CMOS |
MIL-PRF-38535 Class Q |
192 |
40000 |
3.3 |
3.3 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
2304 CLBS, 40000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates 130000 |
e4 |
166 MHz |
192 |
39.37 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
1368 |
Yes |
5.5 V |
576 |
CMOS |
MIL-PRF-38535 |
192 |
10000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2.7 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Maximum usable gates = 30000 |
e0 |
111 MHz |
192 |
39.37 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.