Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1157 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
1 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1157 |
4 |
35 mm |
No |
e1 |
30 s |
245 °C (473 °F) |
35 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B1761 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
||||||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
229050 |
Grid Array |
1 mm |
125 °C (257 °F) |
229050 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1761 |
4 |
42.5 mm |
No |
e1 |
30 s |
245 °C (473 °F) |
42.5 mm |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
432 |
LBGA |
Square |
Plastic/Epoxy |
Yes |
3.6 V |
2304 |
CMOS |
MIL-PRF-38535 Class N |
40000 |
3.3 |
Grid Array, Low Profile |
3 V |
1.27 mm |
125 °C (257 °F) |
1.6 ns |
2304 CLBS, 40000 Gates |
-55 °C (-67 °F) |
Gold |
Bottom |
S-PBGA-B432 |
1.7 mm |
40 mm |
No |
Maximum usable gates 130000 |
e4 |
166 MHz |
40 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 |
10000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 10000 to 30000 |
166 MHz |
39.37 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
5.5 V |
CMOS |
MIL-STD-883 |
64 |
2000 |
5 |
5 V |
Flatpack |
QFL100,.7SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.683 mm |
17.27 mm |
No |
e4 |
100 MHz |
64 |
17.27 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
100 |
CMOS |
1500 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
9 ns |
100 CLBS, 1500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
360 flip-flops; typical gates = 1500-2000 |
70 MHz |
27.94 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
64 |
CMOS |
2000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
27.94 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
64 |
CMOS |
1000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
7 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500 |
e3 |
100 MHz |
27.94 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
668 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.26 V |
CMOS |
Grid Array |
BGA668,26X26,40 |
1.14 V |
1 mm |
125 °C (257 °F) |
0.78 ns |
-55 °C (-67 °F) |
Bottom |
S-PBGA-B668 |
2.85 mm |
27 mm |
27 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
320 |
CMOS |
142 |
5000 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
2.921 mm |
28.702 mm |
No |
928 flip-flops; typical gates = 5000-6000; power-down supplier current = 250 µA |
e0 |
70 MHz |
142 |
28.702 mm |
||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
950 |
Yes |
5.5 V |
400 |
CMOS |
MIL-PRF-38535 Class Q |
160 |
7000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK196,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
3.9 ns |
400 CLBS, 7000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F196 |
3.302 mm |
34.29 mm |
No |
Typical gates = 7000-20000 |
e4 |
111 MHz |
160 |
34.29 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
96 |
3000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
190 MHz |
96 |
37.084 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
224 |
No |
224 |
CMOS |
110 |
3500 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
224 CLBS, 3500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
688 flip-flops; typical gates = 3500-4500; power-down supplier current = 170 µA |
50 MHz |
110 |
37.084 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
475 |
HIPGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
3.6 V |
3136 |
CMOS |
MIL-PRF-38535 Class Q |
55000 |
3.3 |
Grid Array, Heat Sink/Slug, Interstitial Pitch |
3 V |
2.54 mm |
125 °C (257 °F) |
1.3 ns |
3136 CLBS, 55000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P475 |
5.969 mm |
54.864 mm |
No |
e0 |
200 MHz |
54.864 mm |
||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
324 |
CMOS |
6000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
324 CLBS, 6000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
e3 |
111 MHz |
47.244 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
1 |
2.921 mm |
19.05 mm |
No |
256 flip-flops; typical gates = 1000-1500; power-down supplier current = 50 µA |
70 MHz |
64 |
19.05 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
144 |
CMOS |
2000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
2.921 mm |
19.05 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
50 MHz |
19.05 mm |
|||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
1 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1761 |
4 |
35 mm |
No |
e1 |
30 s |
245 °C (473 °F) |
35 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1156 |
BGA |
Square |
Plastic/Epoxy |
241152 |
Yes |
18840 |
CMOS |
600 |
Grid Array |
BGA1156,34X34,40 |
1 mm |
125 °C (257 °F) |
0.85 ns |
18840 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1156 |
4 |
3.5 mm |
35 mm |
e1 |
30 s |
600 |
245 °C (473 °F) |
35 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Yes |
5.5 V |
320 |
CMOS |
MIL-STD-883 |
9000 |
5 |
Flatpack |
4.5 V |
1.27 mm |
125 °C (257 °F) |
14 ns |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-XQFP-F164 |
2.92 mm |
No |
e4 |
16 MHz |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
15552 |
Yes |
2.625 V |
3456 |
CMOS |
316 |
661111 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
QFP228(UNSPEC) |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
316 |
39.37 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
196 |
CMOS |
4000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
3.683 mm |
42.164 mm |
No |
616 flip-flops; typical gates = 4000-5000 |
42.164 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Gull Wing |
240 |
FQFP |
Square |
Plastic/Epoxy |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 Class N |
10000 |
3.3 |
Flatpack, Fine Pitch |
3 V |
.5 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Quad |
S-PQFP-G240 |
4.1 mm |
32 mm |
No |
Maximum usable gates 30000 |
166 MHz |
32 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
28.702 mm |
|||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
MIL-PRF-38535 Class Q |
2000 |
5 |
Flatpack |
4.5 V |
125 °C (257 °F) |
14 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F100 |
50 MHz |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Gull Wing |
240 |
FQFP |
Square |
Plastic/Epoxy |
1368 |
Yes |
3.6 V |
576 |
CMOS |
MIL-PRF-38535 Class N |
193 |
10000 |
3.3 |
3.3 V |
Flatpack, Fine Pitch |
QFP240,1.3SQ,20 |
Field Programmable Gate Arrays |
3 V |
.5 mm |
125 °C (257 °F) |
1.6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-PQFP-G240 |
4.1 mm |
32 mm |
No |
Maximum usable gates 30000 |
e0 |
166 MHz |
193 |
32 mm |
|||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
5.5 V |
CMOS |
MIL-STD-883 |
64 |
2000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.2258 mm |
19.05 mm |
No |
e4 |
100 MHz |
64 |
19.05 mm |
||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
456 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.575 V |
1280 |
CMOS |
1000000 |
1.5 |
Grid Array |
1.425 V |
1 mm |
125 °C (257 °F) |
0.44 ns |
1280 CLBS, 1000000 Gates |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn95.5Ag4.0Cu0.5) |
Bottom |
S-PBGA-B456 |
3 |
2.6 mm |
23 mm |
No |
e1 |
650 MHz |
30 s |
250 °C (482 °F) |
23 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Yes |
5.5 V |
64 |
CMOS |
MIL-STD-883 |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-XQFP-F100 |
3.68 mm |
17.27 mm |
No |
e4 |
25 MHz |
17.27 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
784 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.03 V |
75900 |
1 |
Grid Array |
.97 V |
125 °C (257 °F) |
75900 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B784 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
484 |
No |
484 |
CMOS |
176 |
6500 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
484 CLBS, 6500 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
1 |
4.318 mm |
47.244 mm |
No |
Typical gates = 6500-7500 |
188 MHz |
176 |
47.244 mm |
|||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
9000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
50 MHz |
42.164 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
352 |
LBGA |
Square |
Plastic/Epoxy |
Yes |
2.625 V |
1536 |
CMOS |
MIL-PRF-38535 Class N |
322970 |
2.5 |
Grid Array, Low Profile |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Bottom |
S-PBGA-B352 |
1.7 mm |
35 mm |
Yes |
35 mm |
|||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
MIL-STD-883 Class B |
74 |
2000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
14 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
50 MHz |
74 |
27.94 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
576 |
No |
5.5 V |
576 |
CMOS |
192 |
10000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
6 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P223 |
1 |
4.064 mm |
47.244 mm |
No |
1536 flip-flops; typical gates = 10000-13000 |
e0 |
90.9 MHz |
192 |
47.244 mm |
|||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
68 |
PGA |
Square |
Ceramic |
64 |
No |
CMOS |
38535Q/M;38534H;883B |
58 |
5 |
5 V |
Grid Array |
PGA68,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Perpendicular |
S-XPGA-P68 |
No |
50 MHz |
58 |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
608 |
No |
5.5 V |
256 |
CMOS |
125 |
4000 |
5 |
5 V |
Grid Array |
PGA156,16X16 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
256 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
125 MHz |
125 |
42.164 mm |
||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
15552 |
Yes |
2.625 V |
3456 |
CMOS |
MIL-PRF-38535 |
162 |
661111 |
2.5 |
1.2/3.6,2.5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
162 |
39.37 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
38535Q/M;38534H;883B |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
MAX 144 I/OS; 928 flip-flops; typical gates = 5000 - 7500 |
190 MHz |
144 |
42.164 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.