Part | RoHS | Manufacturer | Programmable IC Type | Grading Of Temperature | Form Of Terminal | No. of Terminals | Package Code | Package Shape | Total Dose (V) | Package Body Material | No. of Logic Cells | Surface Mount | Maximum Supply Voltage | No. of CLBs | Technology Used | Screening Level | No. of Inputs | No. of Equivalent Gates | Nominal Supply Voltage (V) | Packing Method | Power Supplies (V) | Package Style (Meter) | Package Equivalence Code | Sub-Category | Minimum Supply Voltage | Pitch Of Terminal | Maximum Operating Temperature | Maximum Combinatorial Delay of a CLB | Organization | Minimum Operating Temperature | Finishing Of Terminal Used | Position Of Terminal | JESD-30 Code | Moisture Sensitivity Level (MSL) | Maximum Seated Height | Width | Qualification | Additional Features | JESD-609 Code | Maximum Clock Frequency | Maximum Time At Peak Reflow Temperature (s) | No. of Outputs | Peak Reflow Temperature (C) | Length |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
Xilinx |
FPGA |
Military |
Ball |
1156 |
BGA |
Square |
Plastic/Epoxy |
314880 |
Yes |
24600 |
CMOS |
600 |
Grid Array |
BGA1156,34X34,40 |
1 mm |
125 °C (257 °F) |
0.85 ns |
24600 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1156 |
4 |
3.5 mm |
35 mm |
e1 |
30 s |
600 |
245 °C (473 °F) |
35 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
320 |
CMOS |
9000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 9000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
MAX 142 I/OS; 928 flip-flops; power-down supplier current = 5 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
27.432 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
3.6 V |
1296 |
CMOS |
MIL-PRF-38535 |
22000 |
3.3 |
Flatpack, Guard Ring |
3 V |
.635 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 22000 to 65000 |
166 MHz |
39.37 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
191 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
400 |
No |
5.5 V |
400 |
CMOS |
MIL-STD-883 Class B |
160 |
7000 |
5 |
5 V |
Grid Array |
PGA191M,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
2.7 ns |
400 CLBS, 7000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P191 |
4.318 mm |
47.244 mm |
No |
Typical gates = 7000-20000 |
e3 |
111 MHz |
160 |
47.244 mm |
||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
MIL-STD-883 Class B |
5000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
3.3 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
e0 |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
Yes |
64 |
CMOS |
64 |
1000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK100,2.6SQ,25 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
7 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
1 |
2.921 mm |
19.05 mm |
No |
256 flip-flops; typical gates = 1000-1500; power-down supplier current = 50 µA |
e0 |
100 MHz |
64 |
19.05 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
Yes |
CMOS |
MIL-STD-883 |
142 |
5 |
5 V |
Flatpack, Guard Ring |
TAPEPAK,164P,.025 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
230 MHz |
142 |
28.702 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
320 |
No |
320 |
CMOS |
MIL-STD-883 |
144 |
5000 |
5 |
5 V |
Grid Array |
PGA175,16X16 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P175 |
4.318 mm |
42.164 mm |
No |
Typical gates = 5000-6000 |
e4 |
188 MHz |
144 |
42.164 mm |
|||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1761 |
4 |
No |
e1 |
30 s |
250 °C (482 °F) |
||||||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
299 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
784 |
CMOS |
13000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P299 |
4.318 mm |
52.324 mm |
No |
e3 |
125 MHz |
52.324 mm |
|||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
14 ns |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
e0 |
17.272 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
576 |
CMOS |
10000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
125 MHz |
47.244 mm |
||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
64 |
No |
64 |
CMOS |
MIL-STD-883 Class B |
64 |
1000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
14 ns |
64 CLBS, 1000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
256 flip-flops; typical gates = 1000-1500; power-down supplier current = 50 µA |
50 MHz |
64 |
27.94 mm |
||||||||||
Xilinx |
FPGA |
Military |
Ball |
352 |
LBGA |
Square |
Plastic/Epoxy |
Yes |
3.6 V |
1296 |
CMOS |
MIL-PRF-38535 Class N |
22000 |
3.3 |
Grid Array, Low Profile |
3 V |
1.27 mm |
125 °C (257 °F) |
1.6 ns |
1296 CLBS, 22000 Gates |
-55 °C (-67 °F) |
Gold |
Bottom |
S-PBGA-B352 |
1.7 mm |
35 mm |
No |
Maximum usable gates 65000 |
e4 |
166 MHz |
35 mm |
|||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
432 |
LBGA |
Square |
Plastic/Epoxy |
Yes |
2.625 V |
1536 |
CMOS |
MIL-PRF-38535 |
322970 |
2.5 |
Grid Array, Low Profile |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
1536 CLBS, 322970 Gates |
-55 °C (-67 °F) |
Tin Silver Copper |
Bottom |
S-PBGA-B432 |
3 |
1.7 mm |
40 mm |
No |
e1 |
30 s |
260 °C (500 °F) |
40 mm |
|||||||||||
|
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
100k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
Yes |
2.625 V |
3456 |
CMOS |
MIL-PRF-38535 Class Q |
661111 |
2.5 |
Flatpack, Guard Ring |
2.375 V |
.635 mm |
125 °C (257 °F) |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Matte Tin |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e3 |
39.37 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
2.625 V |
3456 |
CMOS |
MIL-PRF-38535 Class Q |
661111 |
2.5 |
Flatpack, Guard Ring |
2.375 V |
.635 mm |
125 °C (257 °F) |
0.8 ns |
3456 CLBS, 661111 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
e0 |
39.37 mm |
|||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
575 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.575 V |
1280 |
CMOS |
1000000 |
1.5 |
Grid Array |
1.425 V |
1.27 mm |
125 °C (257 °F) |
0.44 ns |
1280 CLBS, 1000000 Gates |
-55 °C (-67 °F) |
Tin Silver Copper |
Bottom |
S-PBGA-B575 |
2.6 mm |
31 mm |
No |
e1 |
650 MHz |
31 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
5.5 V |
100 |
CMOS |
3000 |
5 |
Grid Array |
4.5 V |
2.54 mm |
125 °C (257 °F) |
9 ns |
100 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
4.318 mm |
27.94 mm |
No |
MAX 74 I/OS; 360 flip-flops; power-down supplier current = 2 µA @ VCC = 3.2 V & T = 25°C |
70 MHz |
27.94 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
64 |
CMOS |
2000 |
5 |
Flatpack |
4.5 V |
.635 mm |
125 °C (257 °F) |
9 ns |
64 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F100 |
3.683 mm |
17.272 mm |
No |
MAX 64 I/OS; 256 flip-flops; power-down supplier current = 1 µA @ VCC = 3.2 V & T = 25°C |
e0 |
70 MHz |
17.272 mm |
||||||||||||||
Xilinx |
FPGA |
Military |
717 |
CGA |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
1.575 V |
3584 |
CMOS |
3000000 |
1.5 |
Grid Array |
1.425 V |
1.27 mm |
125 °C (257 °F) |
0.44 ns |
3584 CLBS, 3000000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Bottom |
S-CBGA-X717 |
3.3 mm |
35 mm |
No |
e3 |
650 MHz |
35 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
1140 |
CGA |
Square |
Ceramic, Metal-Sealed Cofired |
55296 |
Yes |
1.26 V |
6144 |
CMOS |
38535V;38534K;883S |
640 |
1.2 |
1.2,2.5,3.3 V |
Grid Array |
PGA1140,34X34,39 |
Field Programmable Gate Arrays |
1.14 V |
1 mm |
125 °C (257 °F) |
6144 CLBS |
-55 °C (-67 °F) |
Bottom |
S-CBGA-X1140 |
8.47 mm |
35 mm |
No |
1028 MHz |
640 |
35 mm |
|||||||||||||
Xilinx |
FPGA |
Military |
1509 |
CGA |
Square |
120k Rad(Si) |
Ceramic, Metal-Sealed Cofired |
725550 |
Yes |
41460 |
MIL-PRF-38535 Class B |
620 |
Box; Tray |
Grid Array |
CGA1509,39X39,40 |
1 mm |
125 °C (257 °F) |
41460 CLBS |
-55 °C (-67 °F) |
Bottom |
S-CBGA-X1509 |
8.97 mm |
40 mm |
Tray contains 1 device |
620 |
40 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Through-Hole |
8 |
DIP |
Rectangular |
Ceramic, Glass-Sealed |
No |
MIL-STD-883 |
In-Line |
2.54 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Dual |
R-GDIP-T8 |
4.318 mm |
7.62 mm |
No |
9.906 mm |
|||||||||||||||||||||||||
Xilinx |
FPGA |
Military |
560 |
CGA |
Square |
Ceramic |
27648 |
Yes |
CMOS |
404 |
1.2/3.6,2.5 V |
Grid Array |
CGA560,33X33,50 |
Field Programmable Gate Arrays |
1.27 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Bottom |
S-XBGA-X560 |
No |
404 |
|||||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
84 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
38535Q/M;38534H;883B |
74 |
2000 |
5 |
5 V |
Grid Array |
PGA84M,11X11 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P84 |
5.207 mm |
27.94 mm |
No |
Typical gates = 2000-3000 |
188 MHz |
74 |
27.94 mm |
||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
175 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
320 |
CMOS |
5000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P175 |
3.81 mm |
42.164 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
70 MHz |
42.164 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
144 |
CMOS |
2000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000 |
70 MHz |
37.084 mm |
||||||||||||||||||
Xilinx |
FPGA |
Military |
Ball |
560 |
LBGA |
Square |
Plastic/Epoxy |
27648 |
Yes |
2.625 V |
6144 |
CMOS |
MIL-PRF-38535 |
404 |
1124022 |
2.5 |
1.2/3.6,2.5 V |
Grid Array, Low Profile |
BGA560,31X31,50 |
Field Programmable Gate Arrays |
2.375 V |
1.27 mm |
125 °C (257 °F) |
0.8 ns |
1124022 Gates |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B560 |
1.7 mm |
42.5 mm |
Yes |
e0 |
404 |
42.5 mm |
|||||||||
Xilinx |
FPGA |
Military |
Ball |
676 |
BGA |
Square |
Plastic/Epoxy |
Yes |
30300 |
.95 |
Grid Array |
1 mm |
125 °C (257 °F) |
30300 CLBS |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-PBGA-B676 |
3.44 mm |
27 mm |
e0 |
27 mm |
||||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
100 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F100 |
3.429 mm |
19.05 mm |
No |
e4 |
19.05 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Gull Wing |
100 |
QFP |
Rectangular |
Plastic/Epoxy |
144 |
Yes |
144 |
CMOS |
82 |
3000 |
5 |
5 V |
Flatpack |
QFP100,.7X.9 |
Field Programmable Gate Arrays |
.65 mm |
125 °C (257 °F) |
4.1 ns |
144 CLBS, 3000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Quad |
R-PQFP-G100 |
3 |
2.87 mm |
14 mm |
No |
MAX 96 I/OS; 480 flip-flops; typical gates = 3000 - 3700 |
e0 |
190 MHz |
30 s |
82 |
225 °C (437 °F) |
20 mm |
|||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
223 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
1024 |
No |
5.5 V |
784 |
CMOS |
256 |
13000 |
5 |
5 V |
Grid Array |
PGA223,18X18 |
Field Programmable Gate Arrays |
4.5 V |
2.54 mm |
125 °C (257 °F) |
784 CLBS, 13000 Gates |
-55 °C (-67 °F) |
Perpendicular |
S-CPGA-P223 |
4.318 mm |
47.244 mm |
No |
166 MHz |
256 |
47.244 mm |
||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
784 |
BGA |
Square |
Plastic/Epoxy |
Yes |
1.03 V |
75900 |
1 |
Grid Array |
.97 V |
125 °C (257 °F) |
75900 CLBS |
-55 °C (-67 °F) |
Tin/Silver/Copper |
Bottom |
S-PBGA-B784 |
4 |
No |
e1 |
30 s |
245 °C (473 °F) |
|||||||||||||||||||
Xilinx |
FPGA |
Military |
717 |
CGA |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
1.575 V |
3584 |
CMOS |
3000000 |
1.5 |
Grid Array |
1.425 V |
1.27 mm |
125 °C (257 °F) |
0.44 ns |
3584 CLBS, 3000000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Bottom |
S-CBGA-X717 |
3.3 mm |
35 mm |
No |
e3 |
650 MHz |
35 mm |
||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
5.5 V |
400 |
CMOS |
7000 |
5 |
Flatpack, Guard Ring |
4.5 V |
.635 mm |
125 °C (257 °F) |
2.7 ns |
400 CLBS, 7000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Quad |
S-CQFP-F196 |
3.302 mm |
34.29 mm |
No |
Typical gates = 7000-20000 |
e3 |
111 MHz |
34.29 mm |
||||||||||||||
|
Xilinx |
FPGA |
Military |
Ball |
1761 |
BGA |
Square |
Plastic/Epoxy |
Yes |
Grid Array |
1 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) |
Bottom |
S-PBGA-B1761 |
4 |
35 mm |
No |
e1 |
30 s |
245 °C (473 °F) |
35 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
1144 |
CGA |
Square |
Ceramic, Metal-Sealed Cofired |
76032 |
Yes |
1.575 V |
8448 |
CMOS |
824 |
6000000 |
1.5 |
1.5,1.5/3.3,3.3 V |
Grid Array |
CGA1144,34X34,40 |
Field Programmable Gate Arrays |
1.425 V |
1 mm |
125 °C (257 °F) |
0.44 ns |
8448 CLBS, 6000000 Gates |
-55 °C (-67 °F) |
Tin Lead |
Bottom |
S-CBGA-X1144 |
7 mm |
35 mm |
No |
e0 |
650 MHz |
824 |
35 mm |
||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
QFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack |
.635 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Tin Lead |
Quad |
S-CQFP-F164 |
3.683 mm |
27.432 mm |
No |
e0 |
27.432 mm |
|||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
6 ns |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F164 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
||||||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
228 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
1368 |
Yes |
5.5 V |
576 |
CMOS |
MIL-PRF-38535 Class Q |
192 |
10000 |
5 |
5 V |
Flatpack, Guard Ring |
TPAK228,2.5SQ,25 |
Field Programmable Gate Arrays |
4.5 V |
.635 mm |
125 °C (257 °F) |
3.9 ns |
576 CLBS, 10000 Gates |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F228 |
3.302 mm |
39.37 mm |
No |
Typical gates = 10000-30000 |
e4 |
111 MHz |
192 |
39.37 mm |
|||||||
Xilinx |
FPGA |
Military |
Pin/Peg |
156 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
No |
196 |
CMOS |
MIL-STD-883 |
4000 |
5 |
Grid Array |
2.54 mm |
125 °C (257 °F) |
6 ns |
196 CLBS, 4000 Gates |
-55 °C (-67 °F) |
Gold |
Perpendicular |
S-CPGA-P156 |
4.318 mm |
42.164 mm |
No |
e4 |
42.164 mm |
|||||||||||||||||
Xilinx |
FPGA |
Military |
Flat |
196 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
CMOS |
MIL-STD-883 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
-55 °C (-67 °F) |
Gold |
Quad |
S-CQFP-F196 |
3.302 mm |
28.702 mm |
No |
e4 |
28.702 mm |
|||||||||||||||||||||
|
Xilinx |
FPGA |
Military |
Pin/Peg |
132 |
PGA |
Square |
Ceramic, Metal-Sealed Cofired |
144 |
No |
144 |
CMOS |
96 |
2000 |
5 |
5 V |
Grid Array |
PGA132,14X14 |
Field Programmable Gate Arrays |
2.54 mm |
125 °C (257 °F) |
9 ns |
144 CLBS, 2000 Gates |
-55 °C (-67 °F) |
Matte Tin |
Perpendicular |
S-CPGA-P132 |
3.9116 mm |
37.084 mm |
No |
480 flip-flops; typical gates = 2000-3000; power-down supplier current = 120 µA |
e3 |
70 MHz |
96 |
37.084 mm |
|||||||||
Xilinx |
FPGA |
Military |
Flat |
164 |
GQFF |
Square |
Ceramic, Metal-Sealed Cofired |
Yes |
320 |
CMOS |
5000 |
5 |
Flatpack, Guard Ring |
.65 mm |
125 °C (257 °F) |
9 ns |
320 CLBS, 5000 Gates |
-55 °C (-67 °F) |
Quad |
S-CQFP-F164 |
2.921 mm |
28.702 mm |
No |
928 flip-flops; typical gates = 5000-6000 |
70 MHz |
28.702 mm |
Field Programmable Gate Arrays (FPGAs) are digital integrated circuits that are programmable by the user to perform specific logic functions. They consist of a matrix of configurable logic blocks (CLBs) that can be programmed to perform any digital function, as well as programmable interconnects that allow these blocks to be connected in any way the designer wishes. This makes FPGAs highly versatile and customizable, and they are often used in applications where a high degree of flexibility and performance is required.
FPGAs are programmed using specialized software tools that allow the designer to specify the logic functions and interconnects that are required for a particular application. This process is known as synthesis and involves translating the high-level design into a format that can be implemented on the FPGA hardware. The resulting configuration data is then loaded onto the FPGA, allowing it to perform the desired logic functions.
FPGAs are used in a wide range of applications, including digital signal processing, computer networking, and high-performance computing. They offer a number of advantages over traditional fixed-function digital circuits, including the ability to be reprogrammed in the field, lower development costs, and faster time-to-market. However, they also have some disadvantages, including higher power consumption and lower performance compared to custom-designed digital circuits.